Scientific direction Development of key enabling technologies
Transfer of knowledge to industry

PhD : selection by topics

Adaptive CMOS Image Sensor for smart vision systems

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Circuits Intégrés, Intelligents pour l'Image

01-10-2019

SL-DRT-19-0335

william.guicquero@cea.fr

The aim of this thesis is to explore new kind of smart vision sensor architectures using for enhance the sensor reactivity and for simplify the image processing. The studied vision system will use new 3D microelectronic technologies from CEA-leti. These technologies are capable to stack several integrated circuits. The main advantage is to propose a high density of interconnections between them, allowing connection at the pixel level. This characteristic allows us to think about a totally new architecture of the image processing chain of a basic imager (readout, amplification, compensation, colorization, tone mapping) in order to improve the agility, a better image quality, a better energy efficiency, with a low silicon footprint. The PhD student will benefit during his 3-years thesis of the expertise and the scientific excellence of the CEA leti to attend objectives with a high level of innovation through international patents and publications. The dynamic and autonomous candidate, will have a microelectronic master degree, specialized in analog integrated circuit design. A good knowledge of circuit design CAD tools will be important (Cadence, and also Matlab) and good knowledge in image processing will be appreciated. This thesis will start with the state of the art study, then the PhD student will define the optimal architecture. Finally, a test chip will be designed and tested. It will demonstrate the scientific and industrial potentialities of the proposed solutions.

Massively parallel in-memory computing architecture

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Intégration Silicium des Architectures Numériques

01-10-2019

SL-DRT-19-0364

romain.lemaire@cea.fr

Systems-on-chip (SoCs) for embedded computing have always been constrained by memory bandwidth. Nowadays, with the development of application data-intensive, cost (latency, energy) related to memory access for data computation are significantly increasing. A new computing paradigm consisting in performing data computation within the memory (IMC: In-Memory Computing) has been proposed: the idea is to process data where they are stored in order to save energy and latency. Clear separation between computing and storage units is vanishing leading to very new architectures. The objective of this thesis work is to define a massively parallel in-memory computing architecture supporting the interconnection of a matrix of computing tiles based on IMC memory for parallel execution (multiprocessor) and parallel data access (multiple memory banks). The thesis will be based on on-going work in the lab related to SRAM memory and will address higher density memory types. The subject will require an exploratory approach through modeling of the proposed architecture in relation with the targeted applications (big data, artificial intelligence). Design and silicon implementation of innovative blocks of the architecture will validate to proposed concepts.

Machine learning for smart management of next generation batteries with reconfigurable architecture

Département de l'Electricité et de l'Hydrogène pour les Transports (LITEN)

Laboratoire Electronique avancée, Energie et Puissance

01-10-2019

SL-DRT-19-0379

vincent.heiries@cea.fr

Located within the MINATEC campus in Grenoble, CEA-Leti's main mission is to create innovation and transfer it to the industry, by generating research results that prepare for medium and long-term industrial exploitations, positioning its research between academic research and industrial R&D. Within LETI/DSYS, the Sensor Systems, Electronics for Energy Department's mission is to design and manufacture innovative systems to meet the needs of industrial innovation in a wide variety of fields, from automotive to sports and construction. The skills that are involved range from electronics to physics, electromagnetism, magnetostatics, signal processing and applied mathematics. The PhD thesis will take place in the SSCE Service, in the Laboratory of Advanced Electronics and Electronics for Power (LETI/DSIS/SSCE/L2EP). L2EP develops solutions for the interface and the energy management into systems. The laboratory focuses on innovative electronic systems for managing Li-ion (Lithium-ion) battery packs for electric vehicles. From electric transportation to smart power grids, leisure and industry, the battery usage is growing very fast and seems to have a bright future. Although having benefited from major advances in recent years, batteries still suffer from certain limitations, notably in terms of energy density, lifetime and sometimes safety. In this context, the patented reconfigurable switching cell battery architecture proposed and developed in the L2EP laboratory represents a major innovation in this field and allows us to go beyond some of these limitations. Today, batteries composed of a fixed series of cells through which the same current is flowing. These systems are thus limited by the weakest of the cells connected in series. The major advantage of the reconfigurable battery architecture developed is that each cell in a battery pack can be controlled individually and dynamically. This innovative architecture is then able to offer new functionalities (reconstruction of a sinusoidal signal, isolation, dynamic loading of the cells according to their health conditions, etc.). This architecture allows a complete real-time reconfiguration of the battery topology. In addition, thanks to this innovation, it is possible to avoid the components usually essential for a battery system implemented in an AC application: the charger and the inverter. The saving in cost, volume and weight of the system is then very significant. The first objective of this thesis is the development of advanced estimation algorithms for SoX indicators (SoC: State of Charge; SoH: State of Health, SoE: State of Energy, SoP: State of Power) of batteries based on an optimal use of the new potentialities offered by the reconfigurable switched cell architecture. Indeed, this architecture brings new functionalities opening the field to the implementation of new algorithms within the "Battery Management System". Currently, there is an abundant scientific literature on SoX battery estimators. These studies show varying results in terms of accuracy and robustness. The reliable and accurate evaluation of variables such as impedance and cell capacity remains a challenge to date and often requires a heavy and expensive characterization campaign in lab. Thanks to the new reconfigurable battery architecture, these characterization could be done on-line, and significant improvement can be achieved regarding the embedded SoX indicators estimators. In particular, the estimation of cell capacity could be greatly improved by adjusting the estimator, made possible by a controlled load-discharge of some cells individually; the evaluation of the online impedance can be optimized by an active identification process applied to a cell. It is even possible to carry out an online readjustment of the "Open Circuit Voltage (OCV)" characteristic according to the "state of charge (SoC)". SoX estimation algorithms such as Bayesian observers and Machine Learning will take full advantage of these features and could deliver unrivaled performance. The second objective of the thesis is to propose an algorithm based on the estimates described above that optimally exploits the energy of each and all the cells in the battery to increase the autonomy of the system while maximizing its lifetime.

Compact and ultra-wideband antenna arrays in Ka-band

Département Systèmes

Laboratoire Antennes, Propagation, Couplage Inductif

01-09-2019

SL-DRT-19-0386

loic.marnat@cea.fr

Millimeter-wave communication (e.g. 5G) or radar (e.g. automobile) systems require directive antennas to compensate for transmission losses and ultra-wideband antennas to ensure, depending on the targeted application, a high data rate or a fine resolution. Agility of radiation pattern is thus a key point. Array antennas offer undeniable advantages and come with a tradeoff between the number of radiating elements and the number of active circuit to achieve the performance required in terms of beam focalization and radiated power (for a form factor defined by the targeted system). However, classical design rules associated to typical array elements arrangement can be show stopper for the antenna integration in some applications and typically lead to limited operating band and scanning range. The aim of the thesis is to get rid of these limitations and to design a seamless compact phased array antenna while ensuring outstanding performance in terms of band of operation and scanning capabilities. To do so, studies will focus on tightly coupled miniature elements put in an array fashion. Four main steps will be needed to understand and model such compact array antennas: - State of the art on tightly coupled and ultra-wideband antenna arrays, - Theoretical study describing the coupled elements behavior and the law governing the coupling between them in dense arrays, - Design if a compact array based on miniature and ultra-wideband coupled elements. Technology compatible with seamless and low cost solutions will be preferred. - Active Ka-band prototype will be realized and measured. The thesis will lead to a compact active millimeter-wave phased array prototype competitive as compared to actual state of the art. These studies will pave the way to the use of phased array in applications with complex and compact environments such as 5G terminal and access point or automotive radars and even for advanced satellite antennas.

Study and implementation of non-recurrent deep learning algorithms for temporal sequences processing

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Calcul Embarqué

01-01-2019

SL-DRT-19-0393

david.briand@cea.fr

Recurrent neural networks - and notably the Long-Short Term Memory (LSTM) variant - are today at the state of the art for solving many temporal sequence classification problems and in particular used in speech recognition applications (from 2015 for Android) and automatic translation (from 2016 at Google, Apple and Facebook). This type of algorithm is also successfully applied in various applications such as audio event recognition, denoising, language modeling, sequences generations, etc. The success of these approaches comes however with the cost of huge computing power requirements. This is why most of this algorithms are run on the Cloud, and not on the Edge. Moreover, recurrent neural networks are very sensitive to training parameters and can be difficult to converge because gradients internal to their recurrent structure can easily explode or vanish to zero. The adaptation of these algorithms for an embedded implementation is therefore not straightforward, because the recurrence requires a high precision and partially sequential (large latency) computing. Some technics for overcoming these difficulties are starting to appear, but are still in their infancy. Among them, a non-recurrent technic allowing sequence processing with less constrain than LSTM seems promising: hierarchical networks. Temporal convolution networks (TCN) are one of their application. The advantages and drawbacks of this model are studied notably in "An Empirical Evaluation of Generic Convolutional and Recurrent Networks for Sequence Modeling" (Shaojie Bai, J. Zico Kolter, Vladlen Koltun). A basic implementation of each structure showed that TCN are more efficient in almost every test cases. Internal gradients are much more stable and computation can be easily parallelized thanks to the elimination of the recurrence.

Blending intuition with reasoning ? Deep learning augmented with algorithmic logic and abstraction

Département Ingénierie Logiciels et Systèmes (LIST)

Labo.conception des système embarqués et autonomes

01-01-2019

SL-DRT-19-0401

shuai.li@cea.fr

Within machine learning, deep learning, based on neural networks, is a subfield that has gained much traction since several high-profile success stories. Unlike classical computer reasoning, the statistical method by which a neural network solves a problem can be seen as a very primitive form of intuition, as opposite to classical computer reasoning. However, so far the only real success of deep learning has been its ability to self-tune its geometric logic that lets it transform data represented as points in n-dimension, to data represented as points in m-dimension, if we provide enough training data. Unlike a human being, a neural network does not have the ability to reason through algorithmic logic. Furthermore, although neural networks are tremendously powerful for a given task, since they have no ability to achieve global generalization, any deviation in the input data may give unpredicted results, which limits their reusability. Considering the significant cost associated with neural network development, integrating such systems is not always economically viable. It is therefore necessary to abstract, encapsulate, reuse and compose neural networks. Although lacking in deep learning, algorithmic logic and abstraction are today innate to classical software engineering, through programming primitives, software architecture paradigms, and mature methodological patterns like Model-Driven Engineering. Therefore, in this thesis, we propose to blend reusable algorithmic intelligence, providing the ability to reason, with reusable geometric intelligence, providing the ability of intuition. To achieve such an objective, we can explore some ideas like integrating programming control primitives in neural networks, applying software architecture paradigms in neural networks models, and assembling modular systems using libraries containing both algorithmic modules and geometric modules. The results of this thesis will be a stepping stone towards helping companies assemble AI systems for their specific problems, by limiting the costs in expertise, effort, time, and data necessary to integrate neural networks.

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