Scientific direction Development of key enabling technologies
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PhD : selection by topics

Study of 300-GHz electronically reconfigurable transmitarray antennas in monolithic technology

Département Systèmes

Laboratoire Antennes, Propagation, Couplage Inductif

01-12-2018

SL-DRT-19-0320

antonio.clemente@cea.fr

Due to the scarcity of electromagnetic spectrum resources and the need of broad bandwidth for high data-rate communications, the millimetre wave (mm-wave) and sub-THz bands from 30 to 350 GHz are very attractive for 5G and beyond 5G applications. In this context, high gain electronically reconfigurable antennas with beam-steering, multi-beam, and beam-forming capability are required in a huge number of emerging applications for radar, sensing, and communication systems (civil and military) typically ranging from C-band (4-8 GHz) to W-band (75-110 GHz). Typically composed of one or more radiant surfaces operating in transmission mode and illuminated by one or more focal sources, transmitarrays (also called discrete lens) are a recent cutting-edge antenna concept. Transmitarrays are realized using multilayer printed circuit technologies compatible with the integration of the active devices (diodes, MEMS, NEMS, semi-conductors, etc.). These devices can be used to control the electromagnetic field on the array aperture with excellent performances (bandwidth, cross-polarization level). CEA and IETR (university of Rennes I) have a very strong and unique expertise on transmitarray antennas. The previous realized studies form 2006 demonstrated the potentiality of transmitarrays in X-band (8-12 GHz), in Ka-band (28-40 GHz), and in V-band (50-70 GHz). The major scientific & technical innovations beyond the state-of-the-art are the following: first experimental demonstrations ? at world level ? (1) of highly efficient (70%) and highly directive (gain > 43 dBi) flat antennas at 300 GHz, (2) of ultra-flat transmitarray antennas, and (3) of self-alignment techniques for highly-directive flat antennas beyond 80 GHz.

Adaptive CMOS Image Sensor for smart vision systems

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Circuits Intégrés, Intelligents pour l'Image

01-10-2019

SL-DRT-19-0335

william.guicquero@cea.fr

The aim of this thesis is to explore new kind of smart vision sensor architectures using for enhance the sensor reactivity and for simplify the image processing. The studied vision system will use new 3D microelectronic technologies from CEA-leti. These technologies are capable to stack several integrated circuits. The main advantage is to propose a high density of interconnections between them, allowing connection at the pixel level. This characteristic allows us to think about a totally new architecture of the image processing chain of a basic imager (readout, amplification, compensation, colorization, tone mapping) in order to improve the agility, a better image quality, a better energy efficiency, with a low silicon footprint. The PhD student will benefit during his 3-years thesis of the expertise and the scientific excellence of the CEA leti to attend objectives with a high level of innovation through international patents and publications. The dynamic and autonomous candidate, will have a microelectronic master degree, specialized in analog integrated circuit design. A good knowledge of circuit design CAD tools will be important (Cadence, and also Matlab) and good knowledge in image processing will be appreciated. This thesis will start with the state of the art study, then the PhD student will define the optimal architecture. Finally, a test chip will be designed and tested. It will demonstrate the scientific and industrial potentialities of the proposed solutions.

Massively parallel in-memory computing architecture

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Intégration Silicium des Architectures Numériques

01-10-2019

SL-DRT-19-0364

romain.lemaire@cea.fr

Systems-on-chip (SoCs) for embedded computing have always been constrained by memory bandwidth. Nowadays, with the development of application data-intensive, cost (latency, energy) related to memory access for data computation are significantly increasing. A new computing paradigm consisting in performing data computation within the memory (IMC: In-Memory Computing) has been proposed: the idea is to process data where they are stored in order to save energy and latency. Clear separation between computing and storage units is vanishing leading to very new architectures. The objective of this thesis work is to define a massively parallel in-memory computing architecture supporting the interconnection of a matrix of computing tiles based on IMC memory for parallel execution (multiprocessor) and parallel data access (multiple memory banks). The thesis will be based on on-going work in the lab related to SRAM memory and will address higher density memory types. The subject will require an exploratory approach through modeling of the proposed architecture in relation with the targeted applications (big data, artificial intelligence). Design and silicon implementation of innovative blocks of the architecture will validate to proposed concepts.

Protecting binary elliptic curve cryptography against Template atttacks and Horizontal attacks

Département Systèmes

Laboratoire Sécurité des Objets et des Systèmes Physiques

01-09-2019

SL-DRT-19-0385

antoine.loiseau@cea.fr

This study takes place in the field of embedded systems security and the asymetric cryptography against Template and Horizontal side channel attacks. Recent studies, applied to the symetric cryptography, have yielded new side channel attacks : by improving the efficiency of Template attacks, these new attacks allow to bypass countermeasures based on desynchronisation and masking. It is time now to study the relevance of those new Machine Learning-based Template and Horizontal attacks to asymetric cryptography, especially for binary elliptic curves. This thesis follows the work of Antoine Loiseau on Binary Edwards Curves (BEC). Those BECs have been proven to have some intrisic properties of security against side channel attacks. However, latest results have shown that the resistance of BECs against the new ML-based Template and Horizontal attacks have yet to be studied. This thesis aims at qualifying the degree of resistance of those BECs to ML-based Template and Horizontal Attacks and at devising, implementing and testing new countermeasures to twarth those lastest générations of side channel attacks.

Compact and ultra-wideband antenna arrays in Ka-band

Département Systèmes

Laboratoire Antennes, Propagation, Couplage Inductif

01-09-2019

SL-DRT-19-0386

loic.marnat@cea.fr

Millimeter-wave communication (e.g. 5G) or radar (e.g. automobile) systems require directive antennas to compensate for transmission losses and ultra-wideband antennas to ensure, depending on the targeted application, a high data rate or a fine resolution. Agility of radiation pattern is thus a key point. Array antennas offer undeniable advantages and come with a tradeoff between the number of radiating elements and the number of active circuit to achieve the performance required in terms of beam focalization and radiated power (for a form factor defined by the targeted system). However, classical design rules associated to typical array elements arrangement can be show stopper for the antenna integration in some applications and typically lead to limited operating band and scanning range. The aim of the thesis is to get rid of these limitations and to design a seamless compact phased array antenna while ensuring outstanding performance in terms of band of operation and scanning capabilities. To do so, studies will focus on tightly coupled miniature elements put in an array fashion. Four main steps will be needed to understand and model such compact array antennas: - State of the art on tightly coupled and ultra-wideband antenna arrays, - Theoretical study describing the coupled elements behavior and the law governing the coupling between them in dense arrays, - Design if a compact array based on miniature and ultra-wideband coupled elements. Technology compatible with seamless and low cost solutions will be preferred. - Active Ka-band prototype will be realized and measured. The thesis will lead to a compact active millimeter-wave phased array prototype competitive as compared to actual state of the art. These studies will pave the way to the use of phased array in applications with complex and compact environments such as 5G terminal and access point or automotive radars and even for advanced satellite antennas.

Study and implementation of non-recurrent deep learning algorithms for temporal sequences processing

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Calcul Embarqué

01-01-2019

SL-DRT-19-0393

david.briand@cea.fr

Recurrent neural networks - and notably the Long-Short Term Memory (LSTM) variant - are today at the state of the art for solving many temporal sequence classification problems and in particular used in speech recognition applications (from 2015 for Android) and automatic translation (from 2016 at Google, Apple and Facebook). This type of algorithm is also successfully applied in various applications such as audio event recognition, denoising, language modeling, sequences generations, etc. The success of these approaches comes however with the cost of huge computing power requirements. This is why most of this algorithms are run on the Cloud, and not on the Edge. Moreover, recurrent neural networks are very sensitive to training parameters and can be difficult to converge because gradients internal to their recurrent structure can easily explode or vanish to zero. The adaptation of these algorithms for an embedded implementation is therefore not straightforward, because the recurrence requires a high precision and partially sequential (large latency) computing. Some technics for overcoming these difficulties are starting to appear, but are still in their infancy. Among them, a non-recurrent technic allowing sequence processing with less constrain than LSTM seems promising: hierarchical networks. Temporal convolution networks (TCN) are one of their application. The advantages and drawbacks of this model are studied notably in "An Empirical Evaluation of Generic Convolutional and Recurrent Networks for Sequence Modeling" (Shaojie Bai, J. Zico Kolter, Vladlen Koltun). A basic implementation of each structure showed that TCN are more efficient in almost every test cases. Internal gradients are much more stable and computation can be easily parallelized thanks to the elimination of the recurrence.

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