Scientific direction Development of key enabling technologies
Transfer of knowledge to industry

PostDocs : selection by topics

2D materials for Contacts and Gate stacks for advanced CMOS applications

Département Composants Silicium (LETI)

Laboratoire d'Intégration des Composants pour la Logique

01-06-2017

PsD-DRT-17-0039

louis.hutin@cea.fr

Transition Metal Dicalchogenides (TMDs) have displayed interesting properties in numerous fields of nanotechnoogy (CMOS, memory, sensors, photonics etc.), and emerge as promising materials thanks to their functional properties and potential for co-integration, facilitated by their intrinsic features (van der Waals materials). However, their applicative impact remains uncertain due to the challenge of developing their processing in a standard nanoelectronics environment while maintaining a good control of their fundamental properties. The candidate will quantify the electrical properties of various 2D materials in test structures derived from a silicon technology baseline (TLM, Cross-Bridge Kelvin Résistors, MOS capacitors), in order to provide guidelines for device prototyping. Specifically, the primary aim is to assess the interest of these materials as interface layers rather than for transport, for improving: - The contact resistivity via Fermi-level depinning. - Control by the Gate over the inversion charge in the channel via a negative differential capacitance effect.

Cryogenic Analog Front-End for Quantum Computing

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

01-02-2018

PsD-DRT-18-0041

gael.pillonnet@cea.fr

Quantum engineering is a rapidly evolving novel domain in device technology, boosted by the recent progress in semiconductor quantum bits (QuBits) and by the major opportunity to combine the quantum device with dedicated electronics of conventional CMOS technology working at low temperatures (= 4 K). The ultimate goal of the research related to the proposed post-doc will be the development of silicon-based systems containing many QuBits and versatile electronics based on mature industrial technology, in order to facilitate the massive introduction of quantum processors. Nowadays state-of-the-art experiments on low-temperature quantum devices use electronic components at room temperature, but the future development of integrating many QuBits together complicates the device control with the multiplication of data lines. Minimal power dissipation and noise characteristics will be the challenging key elements to control a large number of QuBits. At CEA Grenoble, we have developed the first semiconductor QuBit fully realized on a CMOS 300-mm foundry that uses the spins of holes in Si as quantum state. The subject of the post PhD is aimed to build the electronics needed nearby the QuBit at low temperatures, using industrial CMOS technology (FDSOI 28nm) compatible with Silicon Qubits. The post PhD will be asked to develop his competence in the quantum physics of QuBits, the modelling of transistor parameters at low temperatures, and the design and measurement of analogue electronics, with the main task in developing and testing CMOS circuitry at low temperatures.

3D occupancy grid analysis with a deep learning approach

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Infrastructure et Ateliers Logiciels pour Puces

01-02-2018

PsD-DRT-18-0042

remy.gauguey@cea.fr

The context of this subject is the development of autonomous vehicles / drones / robots. The vehicle environment is represented by a 3D occupancy grid, in which each cell contains the probability of presence of an object. This grid is refreshed over time, thanks to sensor data (Lidar, Radar, Camera). Higher-level algorithms, like path planning or collision avoidance, think in terms of objects described by their path, speed, and nature. It is thus mandatory to get these objects from individual grid cells, with clustering, classification, and tracking. Many previous publications on this topic comes from the context of vision processing, many of them using deep learning. They show a big computational complexity, and do not benefit from occupancy grids specific characteristics (lack of textures, a priori knowledge of areas of interest?). We want to explore new techniques, tailored to occupation grids, and more compatible with embedded and low cost implementation. The objective of the subject is to determine, from a series of 3D occupation grids, the number and the nature of the different objects, their position and velocity vector, exploiting the recent advances of deep learning on unstrucured 3D data.

Ge-on-Insulator (GeOI) substrates for photonics

Département Composants Silicium (LETI)

Laboratoire Intégration et Transfert de Film

01-02-2018

PsD-DRT-18-0045

julie.widiez@cea.fr

The induction of tensile strain in intrinsic and doped Germanium (Ge) is one approach currently explored to transform the Ge indirect bandgap into a direct one. To take full advantage of Ge, we study the Ge CMOS photonics platform with Ge-on-Insulator (GeOI) structure, which enables strong 2D optical confinement in the Ge photonic-wire devices. One recent study in our lab showed the interest of a method of incorporation of mechanical stress into Ge, one of the essential ingredients of the laser. In particular, the method could be applied to the massive Ge, making compatible gap direct and crystalline quality. Post-doc objectives : Development of GeOI substrates from massive Ge donors with tensile strain inside the Ge film. These developments will be realized from the existing Smart Cut / thinning processes, combined with technological steps to overcome their current limits (SAB bonding). The substrates obtained will be characterized to determine their state of deformation as well as their damage (Raman / XRD) and final GeOI substrates will be provided to the application laboratories for the production of photonic components.

Tunnel Junction for UV LEDs: characterization and optimization

Département d'Optronique (LETI)

Laboratoire des Matériaux pour la photonique

01-09-2018

PsD-DRT-18-0047

guy.feuillet@cea.fr

Besides existing UV lamps, UV LEDs emitting in the UV-C region (around 265 nm) are considered as the next solutions for cost efficient water sterilization systems. But existing UV-C LEDs based on AlGaN wide band gap materials and related quantum well heterostructures still have low efficiencies which precludes their widespread use in industrial systems. Analysing the reasons of the low efficiencies of present UV-C LEDs led us to propose a solution based on the use of a Tunnel Junction (TJ) inserted within the AlGaN heterostructure diode. p+/ n+ tunnel junctions are smart solutions to cope with doping related problems in the wide band gap AlGaN materials but give rise to extra tunneling resistances that need to be coped with. The post-doctoral work is dedicated to understanding the physics of tunneling processes in the TJ itself for a better control of the tunneling current. The post-doctoral work will be carried out at the ?Plate-Forme de Nanocaractérization? in CEA/ Grenoble, using different optical, structural and electrical measurements on stand-alone TJs or on TJs inserted within LEDs. The candidate will have to interact strongly with the team in CNRS/CRHEA in Sophia Antipolis where epitaxial growth of the diodes will be undertaken. The work is part of a collaborative project named "DUVET" financed by the Agence Nationale de la Recherche (ANR).

Feasability study and development of models towards SPICE-simulation of silicon Qubit quantum circuits

Département Composants Silicium (LETI)

Laboratoire de Simulation et Modélisation

01-08-2019

PsD-DRT-18-0056

sebastien.martinie@cea.fr

The Compact / SPICE model is the link between the development of technological bricks and circuit design. The model purpose is to accurately reproduce the experimental characteristics essential to digital, analog and mixed circuit design. But today we need deeper investigation to set up the specifications of models for such device, in order to provide adequate tools to help circuit designers building up quantum circuits. The main challenge is to be able to describe the quantum behavior of this architecture. It will also be necessary to study if this behavior must be described via the physical quantities (eg electronic spin, energy level ...) or by logical quantities (quantum state, matrix of transformation, ...). It will also be necessary to take into account the compatibility between the mathematical formalism and the standard tools of compact modeling (through Verilog-A description). Following recent experimental research activities (between CEA and CNRS) concerning the first demonstration of hole spin qubit on SOI, we propose first to investigate how to model such device through macro modeling approach where SET compact model, inclusion of magnetic spin degeneracy and management of RF excitation are main steps. The challenges in regards to literature are inclusion of magnetic field in SET model, description of resonant tunneling, RF excitation of SET and reproduction of Rabi oscillations.

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