Scientific direction Development of key enabling technologies
Transfer of knowledge to industry

PhD : selection by topics

Technological challenges >> New computing paradigms, circuits and technologies, incl. quantum
2 proposition(s).

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Scaling evaluation of ultra-low power BEOL integrated HfO2-based ferroelectric memory arrays towards 28nm node

Département Composants Silicium (LETI)

Laboratoire de Composants Mémoires

01-10-2021

SL-DRT-21-0362

laurent.grenouillet@cea.fr

New computing paradigms, circuits and technologies, incl. quantum (.pdf)

The recent discovery of ferroelectricity in HfO2 thin films generates a strong interest in integrating this CMOS-compatible and scalable material in ultra-low power ferroelectric memories and neuromorphic circuits. Within the last 6 months excellent results were reported on HfO2-based ferroelectric capacitors integrated in the Back-End Of Line of 130nm CMOS, confirming their potential for non-volatile memory applications. In this context, HfO2-based ferroelectric capacitors will be fabricated and electrically characterized to assess their potential to be scaled towards 28nm node. The candidate will perform advanced electrical characterization on state-of-the-art TiN/doped HfO2/TiN single capacitors with different areas, as well as 16kbit FeRAM arrays. Remanent polarization, coercive field, and imprint values will be extracted as a function of cycling (endurance) and temperature (data retention) for various pulse voltages/durations. Based on array characterization where large statistics is available, the physical mechanisms responsible for the reliability issues will be investigated. The results will be used to optimize the capacitor electrical properties to further design low voltage, ultra fast, scaled FeRAM memory arrays integrated within 28nm FDSOI node.

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Superconductor Integration for thermal management of quantum computing and spatial multi-chip platforms

Département Composants Silicium (LETI)

Laboratoire Packaging et 3D

01-09-2021

SL-DRT-21-0411

jean.charbonnier@cea.fr

New computing paradigms, circuits and technologies, incl. quantum (.pdf)

As part of Quantum Silicon Grenoble project, teams at CEA-LETI, CEA-IRIG and Néel Institute aim at building a quantum accelerator with silicon spin quantum bits (qubits). Compatible with large-scale production, existing integration processes on Si are a real advantage for the scalability of these qubits. The extreme qubit operating conditions (cryogenic temperatures =1K, high frequencies in the range of a few GHz, high signal density) require the development of adapted technological building blocks. To interconnect the qubits and the controlled circuits, integration of superconducting metals is promising. Indeed, their vanishing resistance at low temperatures and the low thermal conductivity of superconductors also enables to protect the qubits from the heat generated by the control electronics circuits integrated close-by. Note that these developments will also benefit spatial applications sharing similar operating constraints. The thesis will focus on: 1) Studying the superconducting properties of Nb, NbN, TiN, Al and any combination of these materials during integration processes to optimize them for a single level of routing and multilayers pads. Establishing low temperature compatible thermal conductivity measurement set-up, protocol and sample design. 2) Transferring the acquired knowledge in term of integration and thermal conductivities to develop the next generation of multi-chip platform hosting qubits and control electronics circuits. The PhD student will be part of the 3D integration and packaging lab of CEA-LETI (Grenoble) and will interact very closely with the Spectral-imaging laboratory for space science at CEA-IRFU (Saclay) for thermal conductivity measurements.

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