Scientific direction Development of key enabling technologies
Transfer of knowledge to industry

PhD : selection by topics

Technological challenges >> Emerging materials and processes for nanotechnologies and microelectronics
12 proposition(s).

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Electrochemical deposition of insulating polymer films

Département des Plateformes Technologiques (LETI)

Laboratoire

01-10-2020

SL-DRT-20-0308

paul.haumesser@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

The electrohoretic deposition is a well known technique to form polymeric coatings with a variety of materials such as polyetherimide (PEI). This technique usually requires the application of several (tens of) volts. Under such conditions, electrochemical reactions occur at the electrodes, such as solvent decomposition, that promote polymer precipitation at their surface. Recent results suggest that these electrochemical reactions are sufficiently active at much lower overpotentials (below 3V). This would enable deposition processes under mild conditions with improved control over the film properties. In this thesis, the mechanisms at play during the deposition of PEI under such mild conditions will be studied, with the aim of developing a process suitable for the fabrication of capacitors with high breakdown voltage. This approach will also be extended to other insulating polymers compatible with healthcare applications (such as packaging of wiring circuits for implant systems) or to hydrophilic and/or porous polymers for the encapsulation of biologic structures (cells, enzymes, bacteria) or cell filtration in biochips.

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Study of dynamic degradation and reliability of advanced GaN on Si power devices

Département Composants Silicium (LETI)

Laboratoire de Caractérisation et Test Electrique

01-10-2020

SL-DRT-20-0430

william.vandendaele@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

GaN-on-Si based power devices are now considered as the next generation of mass market devices for high frequency & low looses power converters (DC/DC, AC/DC or DC/AC). In this vision, LETI is developing its own pîlot line of GaN on Si power devices (CMOS compatible) from the GaN epitaxy to the final power module. These devices are supposed to operate dynamically between high voltage stage (650V and below) and high current state (> 20A) at high frequencies (> 100kHz). Statics and dynamic performances being proved, it is worth of interest to test and study reliability of these devices under high voltage stress and high temperature as well as under practical swithching conditions (hard/soft/ZVS). These studies aim to understand the underlying physical degradation mechanisms arising under operating conditions and ultimately to stabilize the technologie for industrial technological transfer. The PhD student will be responsible of : - Finalizing exisiting dynamic setups and create new ones especially concerning on-wafer switching test (limitations/feasibility) - In Depth study of HEMT electrical parameters degradation (Ron, Vt, Sw?) as well as Diode parameters (Vf, Sw) during DC or AC stress to determine the root cause of the degradation leading to reliability reduction. - Determination of Switching SOA of GaN based devices from LETI as well as studying new acceleration factors such as duty factor or switching frequency - Localization and Identification of Failure point and understanding of the Failure root cause through FA studies (IR or visible camera + FIB/MEB studies) - Proposal of new technological solutions to overcome some early failures and low realiblity issues The PhD student will be curious, open minded and team worker.

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Development of innovative chalcogenide material etching processes for non-volatile memories and photonic

Département des Plateformes Technologiques (LETI)

Laboratoire Gravure

01-09-2020

SL-DRT-20-0625

christelle.boixaderas@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

The patterning steps (etching / stripping / cleaning) have adverse effects on the properties of chalcogenide films. It is therefore essential to study this patterning brick in order to propose new dry etching solutions and associated post treatments. After a first phase of bibliographic research and training in clean room on tools necessary for future works, the student will propose a methodology allowing the understanding of the mechanisms of etching of the reference process and modifications of the GeSbTe (and other alloys) by surface analyzes (bottom and sidewall of the structures) It will propose and implement improvements to the reference process (chemistry, plasma parameters, etc.) that will ensure that the chalcogenide remains intact during the flow of memory fabrication. Then, he will have to choose the integrations and materials for a test vehicle in memory and Photonics. The challenge will be to make improvements to the reference process of the memory stack based on the study of the previous phase: stack etching, stripping, management of waiting times between stages. Finally, it would be interesting to measure the impact of the changes by electrical results on the memory cells (gain / loss on the intrinsic characteristics of a PCM memory).

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Phase-Change Memory for 28nm and beyond: New Frontiers and Innovations at the Limits of the Non-Volatile Memory Scaling Roadmap for the Automobile Microcontrollers of Tomorrow

Département Composants Silicium (LETI)

Laboratoire de Composants Mémoires

01-10-2020

SL-DRT-20-0630

gabriele.navarro@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

Phase-Change Memory (PCM) represents a major candidate among the resistive non-volatile memory (NVM) technologies. PCM features properties of both DRAM and Flash, and its advanced state in terms of development and industrialization in Storage Class Memory (SCM) applications and in embedded PCM-based microcontrollers for automotive applications make it an undeniable breakthrough in the present storage scenario. In order to target automotive applications in down to 10nm technology nodes, next PCM generation should face extreme scaling and provide at the same time material integrity during fabrication steps, low power operations and reliability in high temperature environment. The objective of the PhD is to contribute to the development of the next generation of Non-Volatile PCM for embedded automotive applications. New materials and new architectures will be investigated involving physicochemical analyses and electrical characterization of LETI and industrial PCM prototypes. In addition, the student will be involved in the collaboration with the industrial partner, and experts at the international level in the field of phase-change materials.

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Innovative package using ultra-thin chip transfer on substrate (UTCoS)

Département Composants Silicium (LETI)

Laboratoire Packaging et 3D

01-07-2020

SL-DRT-20-0703

gabriel.pares@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

The subject is in the field of advanced microsystems, which is a strategic axis for CEA-LETI associated with current packaging trends: extreme compactness, conformability and functionalization. The approach developed is unique and allows the carrying of ultra-fine chips ("substrate-less ") on any type of host substrates with a process adaptable to different bonding solutions including direct bonding or with an intermediate layer. It uses CEA-leti's expertise in ultra-thinning of layers, temporary and permanent bonding techniques, thin layer transfer on temporary carrier and advanced cutting techniques (plasma, laser). In addition, it uses advanced packaging technologies with thin FLEX substrates, molding encapsulation and additive technology interconnections (RDL, 3D printing and screen-printing). The proposed solution is generic and addresses many applications as CMOS image sensors, MEMS (sensors and piezo-electrics actuators), RF ICs (filters, switches, antenna arrays). The focus of the study will be on CMOS image sensor with passive and active focal plan curvature with the objective of realizing a first functional demonstrator.

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Asymetrical pattern manufacturing for light managment

Département des Plateformes Technologiques (LETI)

Laboratoire Gravure

01-09-2020

SL-DRT-20-0781

slandis@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

The introduction of augmented reality, especially on portable optical systems such as eyeglasses, requires the manufacture of specific diffraction gratings to generate immersive images in a very small volume. One of their specificities is that they have an asymmetrical geometry (inclined sidewalls) making them particularly complicated to manufacture with the standard processes used for micro systems and microelectronics.

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Development of an innovative method for identify the thermomechanical properties of thin films. Application to the design and manufacture of a microelectronic device

Département des Plateformes Technologiques (LETI)

Laboratoire Propriétés des Matériaux et Structures

01-10-2020

SL-DRT-20-0804

lionel.vignoud@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

Frame and context: the design and manufacture of microelectronic devices require knowledge the thermomechanical properties evolution of the materials that make up the components. Based on experimental measurements, data processing and simulation tools (MATLAB), we propose to develop an innovative method for identifying the module E and the coefficient of thermal expansion of thin layers. We will apply this work to the manufacture of a microelectronic device. Work required: the student in engineering school or master's degree in mechanics and/or materials, will be trained and must master both the experimental measurement techniques used to characterize the materials (in a clean room environment) and the analysis and calculation tools that we will use in this study. He will work on the design, manufacture and reliability of microelectronic devices with different teams from LETI and ST Microelectronics. The objective is to limit component strain, optimize manufacturing steps and finally, make devices more reliable.

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Dopant activation in SiGe thin films: process optimization, characterization and numerical simulation

Département des Plateformes Technologiques (LETI)

Laboratoire

01-04-2020

SL-DRT-20-0817

sebastien.kerdiles@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

CEA-LETI has recently installed in its state-of-the-art cleanrooms a new annealing equipment based on a nanosecond pulsed ultraviolet laser. This innovative thermal treatment enables processes at very high temperatures with extremely short durations, leading to heat confinement within a few hundred nanometers below the surface. Thanks to these unprecedented features, such nanosecond laser process is forseen as the next annealing technology generation with huge expectations especially for electronic devices such as advanced CMOS, memories and microsystems (MEMS). In the framework of a european research project (MUNDFAB, with partners laboratories from Germany, Austria, Italy and Poland), CEA-LETI and CNRS-LAAS jointly propose a doctoral research work targeting the development, the optimization and the simulation of dopant activation processes in SiGe thin films by nanosecond laser annealing. To reach this goal, the PhD student will combine experimental work in cleanrooms, electrical and physical characterization and multi-physics numerical simulations. Nanosecond laser annealing will be investigated in ultra-thin semiconducting films containing high concentrations of dopants, introduced directly during the epitaxial film growth or by a subsequent ion implantation. The PhD student will explore the limits of this disruptive annealing technique. Various technological approaches will be explored to tentatively control the crystalline quality of the laser annealed films, the germanium and dopant segregation and the surface roughness. The candidate should have strong knowledge in physics of semiconductors, materials science and microelectronics. He/she should appreciate team work and be rigorous, creative and endowed with good summarizing skills.

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Doping and confinement impacts on TiSi2 formation assisted by nanosecond laser annealing. Application to contacts for advanced imaging technologies

Département des Plateformes Technologiques (LETI)

Laboratoire

01-09-2020

SL-DRT-20-0821

sebastien.kerdiles@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

Imaging technologies based on silicon devices are today widely spread in mobile phones, sensing and automotive applications. Many technical optimizations have enabled their increasing market penetration. Currently, in the optical sensor region, namely the pixels, electrical contacts are based on a silicide last integration, in which titanium silicide is formed after contact via etching. The electrical resistance of these ?TiSi' contacts is still too high and exhibits a strong lot-to-lot and within wafer dispersion. The current process will then not be a realistic option for mass production in the coming years. Recent improvements have been demonstrated by combining optimized Ti/TiN deposition with a disruptive thermal treatment available at CEA-LETI, namely the nanosecond laser annealing. The thesis work proposed targets to further develop these processes and understand the corresponding mechanisms and good results. This doctoral research is a collaboration between IM2NP (Institut Matériaux Microélectronique Nanosciences de Provence) in Marseille, CEA-LETI in Grenoble and STMicroelectronics R&D center in Crolles. The main goal of this thesis is to integrate and optimize innovative processes enabling good electrical contacts for advanced imaging technologies being developed in Crolles fab. First, the study will focus on the effects of doping and substrate nature on the titanium silicide formation. P+ and polycrystalline silicon active regions will be explored through sheet resistance measurements, X-ray diffraction and atom probe tomography. A set of optimal conditions will be determined. Then, the impact of the confinement on the silicide contact formation will be investigated using patterned production wafers. Finally, an innovative integration scheme will be proposed and tested on production wafers combining optimal preparation and deposition conditions with nanosecond laser annealing. This new path will be evaluated in terms of yield through electrical and optical characterizations.

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Optomechanical Cristal coupled to a SAW for microwave to infrared transduction

Département Composants Silicium (LETI)

Laboratoire Composants Micro-Capteurs

01-10-2020

SL-DRT-20-0832

guillaume.jourdan@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

The most promising quantum computing platforms today are operated at very low temperatures at microwave frequencies, while telecommunication networks capable of preserving information in unconventional states (superposition, entanglement) use infrared (IR) photons at room temperature. Current frequency conversion means offer poor conversion efficiencies (10-6), which make them unusable for processing quantum information. A very highly efficient optical microwave converter is an essential step in linking these two frequency domains and creating a genuine network of distributed quantum computers (quantum internet). The proposed thesis topic aims to develop such a converter by exploiting the multi-scale coupling properties of mechanical nanoresonators. The first technological bricks have recently been produced with coupled mechanical/IR or mechanical/microwave systems in quantum regime. The aim here is to design an optomechanical crystal coupled to an IR resonator. The optomechanical crystal operating at microwave frequencies (GHz) will be actuated with the help of a SAW (Acoustic Wave Surface) powered by a microwave wave. This type of system offers a very low rate of insertion of conventional noise into the conversion process. The AlN deposition will be carried out in Leti's clean room, and then the subsequent steps can be continued at the PTA (academic clean room) which offers more flexibility in terms of the manufacturing process. A collaboration is in place with the Néel Institute (CNRS) in Grenoble to characterize these ultra-low temperature (<100mK) devices. This will allow the devices to be tested and compared with the expected performance. It will then be necessary to review the modelling and design based on the measurements in order to ensure that all phenomena are understood.

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Innovative Mixed RF and low power devices integration in view of advanced fdsoi SOC

Département Composants Silicium (LETI)

Laboratoire d'Intégration des Composants pour la Logique

01-10-2020

SL-DRT-20-1027

claire.fenouillet-beranger@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

Connected mobile devices are becoming a strategic imperative in order to remain attractive, improve efficiency and competitive for advanced electronic applications. The wireless revolution where Laptops, Smartphone's, tablets, TVs, vehicles and enterprises are connected in a cloud style environment makes possible communication anywhere at any time. Recent developments in wireless communications with the emergence of advanced radio-frequency standard such as LTE, LTE-A and 5 G have brought numerous challenges. The most critical challenge is to provide higher levels of integration with more power efficiency and cost-effective solutions on the same-chip. In parallel to the development of nanometer CMOS as well as beyond-CMOS device technologies for switching, memory and analog functions, the increasing need to integrate various (heterogeneous) technologies (e.g. RF communication, power control, passive components, sensors, actuators) helps to migrate from the system board-level into the system-in- package (SiP) or to the system-on- chip (SoC). In fact, mobile System-on-Chip (SoC) with heterogeneous integration of multiple technologies has truly revolutionized the semiconductor industry. Thanks to the trap-rich Silicon-on-Insulator (SOI) substrate invented at UCL and developed in collaboration with SOITEC, RF SOI presents outstanding RF performance. In addition, the presence of the buried oxide layer not only reduces the junction capacitance but also offers the opportunity of using high resistivity substrate to reduce substrate related RF losses and coupling. However in case of SoC integration the trap-rich is not suitable all across the wafer and localized solutions should be envisaged. Fabrication on a 28FDSOI 300mm platform of specific RF stuctures Characterization of the substrate impact (HR, trap rich, etc ?) on the RF figure of merit Imagine and integrate new technological process schemes to implement localized ?trap-rich like' area before or after FDSOI device realization. Integrate some technological modules on new designed structures and electrical caracterization

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Study of local stochastics variability effects on dimensional control in 193nm immersion lithography

Département des Plateformes Technologiques (LETI)

Laboratoire

01-09-2015

SL-DRT-20-1208

jonathan.pradelles@cea.fr

Emerging materials and processes for nanotechnologies and microelectronics (.pdf)

In advanced embedded Non Volatile Memories technologies, device reliability control is extremely challenging. Most critical process layers are using immersion lithography. Such high resolution processes are known to be prone to local stochastic effect which are now taking a significant part of dimensional variability control. Part of the CEA-LETI (Grenoble), the lithography laboratory (LLIT), jointly with the R&D photolithography group of STMicroelectronics (Crolles), propose a PhD study aiming at measuring, analysisng and mitigating of local stochastics variability effects on dimensional control in 193nm immersion lithography applied to advanced eNVM process 40 / 28nm and beyond. The PhD student will need to build up metrology and characterization solutions mainly based on electronics microscopy imaging computing (CDSEM) so that proper metrology indicators can be used to drive process screening (optical-imaging conditions / chemical ? resist process) to identify the main contributors of stochastics variability. Working on advanced immersion clusters you will also be in close relation with our suppliers (mainly ASML) with regular exchanges with people in Netherlands and California. This work will also be subject to publication in international conferences in Europe or USA (2 to 3 during your PhD period)

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