Scientific Direction

Sciences pour l'ingénieur >> Chimie physique et électrochimie
38 propositions.

Tunable metamaterials for antenna miniaturization at microwave frequencies

Antennas are now highly integrated in many connected objects. Miniaturization technics are often based on geometry modification or non-conventional materials (high permittivity or permeability). Metamaterial are made of a periodic arrangement of sub-wavelength shapes and have been studied for many years with a special focus on 2D or 3D shapes. In antenna design, these structured materials have been mainly used as high surface impedance (HIS), surface waves filter or antennas. The main drawback of such metamaterials is their narrow band behavior. Recently, CEA-LETI has developed a new method to modify the metamaterial performances and filtering capabilities. The aim of this Ph D thesis is to develop a new concept of agility (bandwidth improvement) for high impedance surfaces. The target applications are related to integrated thin antennas for aeronautic, spatial or vehicles. The final objective is to reduce significantly (~lambda/30) the antenna thickness with active devices added to address the largest bandwidth possible. The Ph D student activities will consist in the theoretical modelling and design of this novel metamaterial and the validation of its performances through electromagnetic 2D and 3D simulations. Demonstrators will be selected, fabricated and tested in CEA-Leti facilities (anechoic chambers). The Ph D will be carried out at the antenna and propagation laboratory in Grenoble. The student will be part of the research team (permanent staff, Ph. D students and short term engineers) and supervised by a permanent senior researcher. Skills : Antenna and high frequency Key words : Metamaterials, Antennas, Microwave, High Frequency Surface, Electromagnetic Band Gap

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Département : Département Systèmes et Intégration de Solutions (LETI) Laboratory : Laboratoire Antennes et Propagation Start Date : 01-02-2014 ECA Code : SL-DRT-14-0009 Contact : jean-francois.pintos@cea.fr

Developement and application of grazing incidence X-ray fluorescence (GIXRF) technique for reference-free quantitative analysis

The development of innovative materials requires the implementation of specific techniques for their characterization. The X-Ray fluorescence analysis under grazing incidence (GIXRF ) technique allows identification and quantitation of materails and impurities, including in-depth characterization of interfaces, and finally, correlation of material properties with their structure. This technique will be implemented on a dedicated goniometer, which will be installed in late 2013 on the Metrology beamline of the SOLEIL synchrotron facility. Metrological characterization work will be required before commissioning the goniometer and using it for reliable quantitative measurements. The development of reference-free analysis will require the measurement of atomic parameters (attenuation coefficients, fluorescence yields, Coster - Kronig coefficients) and the development of specific tools to perform spectral analysis and quantification of materials. The PhD student will develop and validate measurement protocols for quantitative analysis under grazing incidence and will have to produce quantitative results on selected samples. This work , linked with two European projects will be undertaken in conjunction with the German laboratory PTB (Physikalisch Technische Bundestanstalt).

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Département : Laboratoire National Henri Becquerel (LIST) Laboratory : Laboratoire de Métrologie de l'Activité Start Date : 01-10-2014 ECA Code : SL-DRT-14-0026 Contact : yves.menesguen@cea.fr

New X-ray imaging CMOS detector working with high flux simultaneously in integration mode and spectrometry

Most of recent digital X-ray apparatus measure the amount of absorbed X-ray in the detector, however no information on photons energy is available. Although adding spectroscopic information makes better diagnosis (enhanced visualization of tendons, cartilage ? or contrast medium such as iodine). CMOS imaging detectors in medical X-ray domain give the opportunity to add complexity thanks to the useable transistor number increase. The main objective of this Ph.D. work is to prove the feasibility of a CMOS detector adding spectral information ("colored image") to usual X-rays. After conducting a literature review to found state of the art devices and detectors, a preliminary study will be performed to size all detector parameters with simulator tools. These simulations will relate to several fields such as interaction of radiation with matter, behavioral modeling, electrical simulation (SPICE like). Then an ASIC design or prototyping will be performed in an electronic lab. It will allow to measure real performances and tell how the spectroscopic function contributes to improve images from CMOS detectors. This Ph.D. work requires (analog) Electronic training with abilities to Radiation-Matter physics and a taste for instrumentation and testing.

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Département : Département Microtechnologies pour la Biologie et la Santé (LETI) Laboratory : Laboratoire Détecteurs Start Date : 01-09-2014 ECA Code : SL-DRT-14-0027 Contact : jean-luc.moro@cea.fr

Contribution to the Internet of Things Energy Efficiency: Compact and Adaptable Power Delivery

The PhD project aims to study fully integrated on-chip and power efficient DC-DC converter over a wide operating range of microsystem emerging from Internet of Things. The integration of power management in the same package as the electronic function is a key performance to achieve efficient, compact and robust embedded system to widely spread them over environment. Unfortunately the existed power supplies answer partially the challenges in terms of surface, power delivery and efficiency. Based on Internet of Things constraints, the PhD student will study the literature and will propose, design and experimentally demonstrate a relevant topology to increase the power efficiency and the power density. The research program includes CEA, Ampère laboratory and UC Berkeley to study alternative of the fully capacitive or inductive DC-DC switching converter, based on LC topologies out of resonant frequency, which are not studied in the literature for on chip power supply.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Start Date : 01-10-2014 ECA Code : SL-DRT-14-0035 Contact : gael.pillonnet@cea.fr

Compact Harvester from Renewable Marine Energy for Deep Sea Observatory

The objective of the thesis is to propose a dedicated electronic to optimize the power efficiency of the energy transfer from microbial fuel cell and to power a deep sea observatory. The development of sea observatories with local and long-term monitoring is crucial to clearly understand the environmental process and for climate change prediction. Unfortunately the geographically distributed infrastructure composed of thousands observatories is not affordable with existed technologies especially due to the battery limitations (harmful waste, lifetime, cost). The PhD is included in the research project RECIF which have the objective to replace the chemical battery by the ambient marine energy harvester i.e. the sediment fuel cell. The PhD student will study the coupling between the microorganism mechanism and the associated electronics to find the best harvesting profile for a maximal energy extraction. The electronic integration using the microelectronic process will be proposed to optimize the energy efficiency for powering deep sea sensor node. The work will be in collaboration with laboratoire de Génie Chimique, one of the leaders in the microbial fuel cell research theme.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Start Date : 01-10-2014 ECA Code : SL-DRT-14-0036 Contact : gael.pillonnet@cea.fr

Investigation of hybrid CBRAM/OXRAM non-volatile memories for low consumption and high reliability

In order to overcome the scaling limits of Flash memories, resistive memories are the subject of a strong interest. Among them, Conductive Bridge Random Access Memories (CBRAM), relying on the reversible formation and disruption of a conductive filament by oxidation and reduction of metallic ions, offer a low consumption but suffer from a poor high temperature retention. On the other hand, OXRAM memories (based on an oxygen vacancy based filament in a metal oxide: HfO2, Ta2O5?) provide 10 years retention at >150°C. The aim of this PhD is to take benefit from these two technologies in order to combine good reliability (high temperature retention) and low power consumption during the memory switching.

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Département : Département Composants Silicium (LETI) Laboratory : Laboratoire Technologies Mémoires Avancées Start Date : 01-10-2014 ECA Code : SL-DRT-14-0056 Contact : gabriel.molas@cea.fr

Conception & modeling of next-generation of MEMS flow sensors

Collaboration framework and context: Current technological solutions of flow sensors have little evolved since the 30s. Many manufacturers are looking for new solutions. The improvements expected are mainly to have access to a generic technology adaptable to any type of fluid (liquid or gas) and all types of pipes. MEMS (Micro Electro Mechanical Systems) are promising technologies that provide a strong integration allowing to target low footprint, power consumption and cost. Work description: This PhD concerns the design of next- generation of MEMS flow sensors whose goal is to address many industrial applications for flow meters and viscometers working on a wide range, cheaper and working for different types of fluids (liquids or gases). In particular, the work is to opt for an innovative approach utilizing the M&NEMS technology developed and patented in the Sensors laboratory of CEA Leti. This technology is a generic multi-sensor platform using an electromechanical transducer based on nano-piezoresistive gauges. The idea is to explore the possibilities of the M&NEMS technology by exploiting the drag forces or the wall shear stresses induced by the fluid flowing in pipes. These forces must be evaluated based on the flow rates of different fluids and applied to the proposed sensor. This will involve: - Modeling and dimensioning of the sensor to adapt the design to the use in the different fluids and level of forces. - Determination of interactions with fluids of different flow rates in order to achieve a concept as generic as possible. - Proposition of MEMS fabrication routes leading to sensors capable of being used in most generic possible contexts.

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Département : Département Composants Silicium (LETI) Laboratory : Laboratoire Composants Micro-Capteurs Start Date : 01-10-2014 ECA Code : SL-DRT-14-0078 Contact : caroline.coutier@cea.fr

Technology for selector-less CBRAM/OXRAM memory arrays based on crossbar architecture

Among the emerging nonvolatile memories (NVM), resistive memory architectures (storing information bits as the resistance value imposed on a resistive-variable device), such as Phase Change Memories (PCM), Programmable Metallization Cell (PMC) or Oxide Resistive RAM (OxRAM) are nowadays considered among the most promising solutions for future generation of low cost embedded non-volatile memories. They collect benefits similar to those of DRAM, and Flash memory (they offer the low programming voltage that Flash does not offer and the nonvolatily that DRAM does not offer and yet have a speed that is comparable to DRAM). These attributes are obviously promising for enabling novel applications (Storage class memory, Intelligent Memory Systems, Neuromorphic Systems,?) where the NVM are integrated into a crossbar memory array. Work description: The PhD thesis gives the opportunity to challenge new RAM applications by taking the best features from resistive RAM memory technology (CBRAM/OXRAM) and implementing them on small crossbar memory arrays. Designing such systems require to identify the best suited selector less RRAM technology: the memory cell has to exhibit a self-compliant and highly nonlinear on state behavior moreover the operating voltages have to be compatible with advanced technology nodes. The action plan for the thesis is as follows: 1. The first objective will be the detailed analysis of different technology options to realize a selector-less memory cell for selector-less crossbar memory arrays (tunneling barrier, self-formed Schottky barrier?) and with operating voltages have to be compatible with advanced technology nodes (band ?gap engineering, optimization of the oxygen vacancy profile?). The test structures developed during the correlated internship will be used to evaluate the performances of different technologies options. 2. Based on the electrical data, a compact model will be developed in collaboration with the experts in the simulation team. The final objective will be to integrate a compact model in a specific simulator in order to evaluate the memory performances at the circuit level. 3. The third objective will be the design of a crossbar memory array considering the memory electrical characteristics (HRS, LRS, memory window, BE resistances, sneak path?). Remark: complementary PhD position in DACLE/LISAN.

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Département : Département Composants Silicium (LETI) Laboratory : Laboratoire Technologies Mémoires Avancées Start Date : 01-10-2014 ECA Code : SL-DRT-14-0086 Contact : elisa.vianello@cea.fr

Development of an innovative structure of high efficiency solar cells for concentrated photovoltaic (CPV) application

The Advanced Substrates Laboratory is specialized in the elaboration of innovative substrates and is internationally renowned in this area. Since several years the LSA is dedicated to the development of thin films or circuits transfer processes that are adapted to the realization of engineered substrates for differents applications including microelectronics, optronics,radiofrequency, optics or solar. In this last area, the laboratory was recently engaged in the development of innovative structures for the production of high-efficiency solar cells addressing the Concentrated PhotoVoltaic (CPV) market through an innovative integration. In the frame of a close collaboration with the FhG-ISE and the Soitec Compagny, a four-junctions cell has been demonstrated that holds the actual world record with an efficiency of 44,7% under 297 suns. In this context some new architectures are considered, that includes in particular some innovatives stackings and integrations at different level of the solar cell. The PhD works will cover the development of these new structures of high-efficiency solar cells, with the objective to pave the way to ultimate performances in terms of energy conversion efficiency and working linearity.

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Département : Département Composants Silicium (LETI) Laboratory : Laboratoire de Substrats Avancés Start Date : 01-10-2014 ECA Code : SL-DRT-14-0113 Contact : aurelie.tauzin@cea.fr

Model Based Testing of real time distributed systems

Symbolic Transition Systems (STS) are composed of a data part and of a state-transition graph part. They specify behaviours of reactive systems with some benefits compared to the use of classical labelled transition systems. Models are often smaller and it is even possible to finitely denote systems having an infinite number of states. In [GAS06], we have defined a model testing algorithm for particular STS called Input Output Symbolic Transition Systems (IOSTS). The symbolic aspect of IOSTS make possible to exploit a particular analysis technique, the so-called symbolic execution, to define a test selection strategy. This technique has been first defined to compute program executions according to some constraints expressed on input values. The main idea is to use symbols instead of concrete data as input values and to derive a symbolic execution tree in order to describe all possible computations in a symbolic way. We have later adapted this algorithm to take into account timing constraints to test real time systems ([EGL11], [BGLE12]). Real time systems are systems in which the respect of timing constraints on computations is as important as the results of computations. We have therefore improved our IOSTS model to express such timing constraints in so-called Timed Input Output Transition Systems (TIOSTS). TIOSTS are simply timed automata ([AD94]) enriched with mechanisms to handle data in a symbolic manner. We have transposed our algorithm with mechanisms that take TIOSTS as entry, and that permit to test the satisfaction of timing constraints appearing in them. However all those techniques are dedicated to test systems with a centralized interface, that is, a unique interface with which the tester interacts. He/She may then completely order events (inputs sent to the system, output received from the system) occurring at this interface. Consequently interactions with the system can be completely modelled as traces (sequences of inputs and outputs, possibly separated by delays in the timed framework). The goal of this thesis is to extend those existing testing techniques to manage distributed real time systems with several interfaces. Interacting with such systems requires exchanging values with it by means of several interfaces in the same testing process. Different events occurring at different interfaces can not be ordered anymore since it is not possible to compare their instants of occurrences (there is no global clock in a distributed system). Therefore testing techniques may not rely on a simple notion of trace anymore. Automatically testing such real time distributed systems is a first-order challenge because lots of nowadays critical systems are representative of this class of systems (e.g. train or plane control systems, automatic trading systems, embedded systems in cars?.) [GAS06] Christophe Gaston, Pascale Le Gall, Nicolas Rapin, Assia Touil, ?Symbolic execution techniques for test purpose definition?, Testing of Software and Communicating Systems: 18th IFIP TC 6/WG 6.1 International Conference, TestCom 2006. Lecture Notes in Computer Science. [EGL11] José Pablo Escobedo, Christophe Gaston, Pascale Le GALL P. Timed Conformance Testing for Orchestrated Service Discovery. 8th International Symposium on Formal Aspects of Component Software: FACS 2011, September 14-16 2011. Springer [BGLE12] Boutheina Bannour, Christophe Gaston, Pascale Le Gall and José Pablo Escobedo, Off-line test case generation for timed symbolic model-based conformance testing, 24th IFIP Int. Conference on Testing Software and Systems: ICTSS'12, November 19-21 2012. Springer [AD94] Rajeev Alur and David L. Dill. A theory of timed automata. Journal of Theoretical Computer Science, 126(2):183?235, 1994.

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Département : Département Ingénierie Logiciels et Systèmes (LIST) Laboratory : Laboratoire d'Ingénierie dirigée par les modèles pour les Systèmes Embarqués Start Date : 01-09-2014 ECA Code : SL-DRT-14-0117 Contact : christophe.gaston@cea.fr

New paradigms for image aquisition and associated embedded processing for future nanometric SoC

the aim of this PhD is to revisit the images acquisition to make it robust and scalable in nanoscale technologies (such as 28nm FDSOI) by coupling new modes of image capture along with integrated co-processing, to fully exploit the integration density and processing capabilities offered by these future nodes. The thesis will focus on both the optimal partitioning of the image acquisition chain (acquisition - quantification - processing) and local or global feedback, performed on the fly, at the focal plane level. This thesis is structured in three parts. During the first part, the candidate will establish the state of the art with two special emphases: - the potential integrated processing capabilities offered by the advanced FDSOI technologies. - the capture functions to be integrated into the pixel array The combination of both will allow to propose the best possible coupling between the imager and the relevant processing. In the second part, the candidate will focus on the design of the image sensor. Finally, an image sensor will be designed and tested to assess and validate the concepts. The candidate for this thesis should have transverse skills ranging from the semiconductor physics to circuit design and signal processing.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoire Circuits Intégrés, Intelligents pour l'Image Start Date : 01-10-2014 ECA Code : SL-DRT-14-0126 Contact : arnaud.verdant@cea.fr

Specification and verification of properties of component-based systems

A lot of software systems are currently composed of of pre-existing subsystems that are connected together to provide a new set of services. Mastering the behavior of such systems can be quite complex, as they are designed through reuse and extension, often with only a partial understanding of each sub-system. A particular issue is to understand how security properties expressed at the global level are reflected at each single component's level. This thesis will propose ways to automatically generate and verify such properties from an abstract, global view of the system. Generation of sub-properties will use the Diversity tool, developed at CEA LIST, that use symbolic execution and projection techniques to define the acceptable behaviors of each component. These result will then be used to provide formal specifications of these components for the verification of their implementation with the Frama-C collection of static analysis tools, also developed at CEA LIST. In addition, we will prove that the properties transformations made along the verification toolchain are semantically well founded.

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Département : Département Ingénierie Logiciels et Systèmes (LIST) Laboratory : Laboratoire pour la Sûreté du Logiciel Start Date : 01-09-2014 ECA Code : SL-DRT-14-0127 Contact : virgile.prevosto@cea.fr

Wireless auto-calibrated sensors using acoustic Lamb waves

The development of wireless sensor networks devoted to the analysis of the ambient environment in industrial installation requires passive, compact and robust sensors. The Laboratory of Radiofrequency Components (LCRF) of CEA-LETI develops acoustic sensors exploiting acoustic Lamb waves, whose response is sensitive to parameters such as temperature, pressure or gaz. Lamb waves being a family of vibration modes of a thin plate, these sensors naturally exhibit several resonances, each of them having its own sensitivity to environmental parameters. This particularity can be exploited to develop auto-calibrated multi-parameter sensors. The goal of this PhD is to design and fabricate wireless sensors using acoustic Lamb waves for high temperature and gaz sensing. First, the candidate will model and design sensors to determine the best strategy for combining the various acoustic resonances and exploit the differential sensitivities to discriminate the various parameters influencing the sensor response. Ultimately, the objective is to get rid of post-production calibration. In a second step, the candidate will propose new sensor designs. The RFID link will be taken into account in an early stage to anticipate the final assembling of the sensor with its antenna and also to evaluate if it is compatible with the multi-mode operation of the sensor. Finally, the candidate will fabricate and characterise sensors, ultimately in the final configuration where it will be linked to an antenna and an external interrogation system through an RFID link.

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Département : Département Composants Silicium (LETI) Laboratory : Laboratoire Composants Radiofréquences Start Date : 01-09-2014 ECA Code : SL-DRT-14-0139 Contact : alexandre.reinhardt@cea.fr

Automatic exploit generation from error traces

One of the key points in cyber-security is to ensure that a given piece of software is free of exploitable bugs (vulnerabilities). Verification and automated testing methods are currently adapted to security concerns. However, while these methods are effective at finding bugs, these bugs are not always relevant in security context since they may not be exploitable. The proposed PhD work focuses on the exploitability analysis of a bug, given a faulty execution trace leading to this bug. The goal is to design methods able to automatically classify the "degree" of exploitability of a given bug, by using formal verification techniques for "generalising" the initial (non-exploitable) trace into an exploit. The candidate can re-use former ideas developed by his advisers in terms of binary code analysis and vulnerability detection. The main challenges here are to go beyond state-of-the-art on the following aspects: the generalisation method, the exploitability model and the environment modelling. The successful candidate will be hosted both at CEA (Paris area, France) and University of Grenoble (Grenoble, France). He will be supervised by Sébastien Bardin (CEA, co-supervisor) and Marie-Laure Potet (Uni. Grenoble, supervisor). This work is part of the BINSEC project (2013-2017), funded by ANR (French research agency), a 4-years project gathering top-level academic and industrial partners in order to advance the state-of-the-art of binary-level security analysis.

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Département : Département Ingénierie Logiciels et Systèmes (LIST) Laboratory : Laboratoire pour la Sûreté du Logiciel Start Date : 01-10-2014 ECA Code : SL-DRT-14-0142 Contact : sebastien.bardin@cea.fr

Robust human activity detection by means of computer vision

Human activity of daily life (?ADL?, such as eating, cooking, reading, using a PC?) by means of computer vision is a significantly growing research topic for 5 years. This will be an integrated component of video analysis systems in the coming years, targeting to improve domotic devices or to assist elderly people at home. Most solutions proposed in the Literature, based on statistical learning, including the approach developed in our Lab, allow reaching promising detection results on public activity datasets. However, when running the algorithms on real video streams, performances drastically decrease; this is mostly because the ways to perform an activity may highly vary from one person to another (including speed and duration), and actions in the datasets are often performed in a quite stereotyped way. Research activity in the proposed PhD work aims to improve robustness of the ADL video detection. This will involve improvement of the database suitability by sample synthesis, enhancement of the detection process by including environment (2D and 3D) information and optimization according to the context (e.g. user specificities) which may be online learned. The proposed methods will be evaluated in a real context, taking benefit from the home living Lab available at CEA. A. CHAN-HON-TONG, C. ACHARD and L. LUCAT : « Deeply Optimized Hough Transform: Application to Action Segmentation?, In proceedings of the 17th International Conference on Image Analysis and Processing (ICIAP), 2013.

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Département : Département Intelligence Ambiante et Systèmes Interactifs (LIST) Laboratory : Vision & Ingénierie des Contenus (SAC) Start Date : 01-09-2014 ECA Code : SL-DRT-14-0148 Contact : laurent.lucat@cea.fr

adhesion and failure of thin metal films on flexible substrates for flexible electronics

Flexible electronic is essential for the development of innovative applications in the field of communicating objects, health and metrology (sensors). For these applications, metal thin film deposition on flexible substrates imposing large deformations must be perfectly controlled. This study requires an important experimental work together with a theoretical approach of the problem. First, the failure (cracking, delamination) of the metal film will be generated using stretching tests, including cycling. Then, the corresponding damage mechanisms will be identified by electron microscopy observation and electrical measurement. Simultaneously, the mechanical properties of the films will be characterized using nanoindentation and more especially scratch tests methods will be developed and compared to other techniques such as four-point bending test for adhesion measurement. Finally, finite element simulations will allow the understanding of identified damage mechanisms. Then, design rules for flexible electronic systems using these stacks will be defined.

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Département : Département Composants Silicium (LETI) Laboratory : Laboratoire de Caractérisation et Fiabilité des Composants Start Date : 01-09-2014 ECA Code : SL-DRT-14-0149 Contact : vincent.mandrillon@cea.fr

Person re-identification in video streams from a dynamic set of identities

Person reidentification in a camera network is probably one of the most challenging task in video-surveillance applications and remains an open subject for further investigation. Despite the increasing research effort in the domain and recent advances in the last few years, the maturity of methods proposed in the litterature is still far from being applicable in real conditions of exploitation because of their lack of robustness. The main difficulties are the low resolution and heterogeneity of camera sensors used in video-surveillance, the high variabilitity of points of view, poses, illumination conditions, and the similarity of visual appearances of the individuals to reidentify. Contrary to most approches of the state of the art which consider a static identity database, we envisage in this thesis the people re-idenfication problem in an « open » world by modelling dynamically (on-the-fly) the set of individuals to be recognized in the video streams. To this aim, semi-supervised learning and active learning methods could be explored. Also the proposed algorithms should be scalable in the number of cameras and observed people, and fast enough to be used in an interactive way.

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Département : Département Intelligence Ambiante et Systèmes Interactifs (LIST) Laboratory : Vision & Ingénierie des Contenus (SAC) Start Date : 01-10-2014 ECA Code : SL-DRT-14-0163 Contact : quoc-cuong.pham@cea.fr

Automated abstraction of models for symbolic analysis

Formal analysis of big complex systems in order to simulate them, to prove properties and to make automated test generation, is generally confronted to the combinatorial explosion of calculus. The use of symbolic calculus reduces efficiently this explosion but the state of the art limits the results. The symbolic approach must be often completed by an abstraction process on the models in order to increase the chances of reaching the complete analysis of big systems. The goal of the thesis is to identify these existing techniques of abstraction (abstract interpretation, qualitative simulation, etc.) and then to integrate them into a methodology and an associated tool, which will be able to increase the performance of the symbolic tool of the LISE laboratory of CEA LIST. The use of these techniques must be done in order to allow the users to exploit the results without knowledge on the mathematical techniques which are necessary. The benefit must be qualitative (exhibition of the behaviors, proof of properties, impossible to process without these abstractions) and quantitative (less time necessary to process the analysis).

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Département : Département Ingénierie Logiciels et Systèmes (LIST) Laboratory : Laboratoire d'Ingénierie dirigée par les modèles pour les Systèmes Embarqués Start Date : 01-09-2013 ECA Code : SL-DRT-14-0173 Contact : jean.pierre.gallois@cea.fr

Time Domain Analogue and RF Signal Processing in Advanced CMOS Nodes

This Ph.D. Thesis is focused in the research of new integrated circuits using the time and other temporal variables, such as the phase, for representing analog and RF signals in combination with advanced CMOS devices(FinFET, FDSOI)for emerging application requiring ultra-low power consumption for the Internet of things and sensor networks applications. Future advanced CMOS technology nodes (10nm and beyond) will offer very low voltage supply levels. In this context, time domain analog signal processing has been proposed recently as a way to fully exploit the excellent transient characteristics of such advanced CMOS nodes and allow sub-1 V operation for ultra-low power consumption analog and RF integrated circuits realization. This Ph.D. thesis will investigate the realization of basic building block functions using the time and other temporal variables, such as the phase, for representing analog and RF signals, instead of voltages or currents. This new paradigm, in combination with the full exploitation of the new devices characteristics (FinFET, FDSOI) should enable the realization of novel architectures for high frequency, low power architectures for radio frequency integrated circuits that will be required by the Internet of Things and the pervasive wireless networks in the nest few years.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoire Architectures Intégrées Radiofréquences Start Date : 01-10-2014 ECA Code : SL-DRT-14-0214 Contact : joseluis.gonzalezjimenez@cea.fr

Definition of a novel physical layer of cognitive radio in the TV white spaces (TVWS): application to wireless sensor networks for critical systems

Wireless Sensor Networks (WSN) are networks build from a few to several thousand of nodes, able to analyze and transmit contextual data. In the context of this research work, we will focus on critical systems, in which a high quality of service is essential. It includes security applications (building monitoring, avionic, energy distribution), military applications (intrusion detection, physical monitoring?), or environmental monitoring (floods emergency?). Ranges can be important and throughput locally high. The issues addressed in this work research are mainly dedicated to the definition of a new physical layer adapted to TVWS (TV white spaces) bands. This physical layer must be extremely robust to guarantee a high quality of service. Moreover, the physical layer must be optimized in order to respect the spectral constraints imposed by the use of TVWS band. During the analysis of possible physical layers, we will explore advanced signal processing algorithms (equalization, iterative processing) with advanced FEC strategy (HARQ, concatenation code). The power consumption and the implementation on a hardware platform will be investigated.

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Département : Département Systèmes et Intégration de Solutions (LETI) Laboratory : Laboratoire Solutions sans fils et Plateformes numériques Start Date : 01-10-2014 ECA Code : SL-DRT-14-0221 Contact : jean-baptiste.dore@cea.fr

Methodological Framework for Dealing with Model Viewpoints

One of the primary purposes of models in engineering is to support communications between various stakeholders in a system. Well-constructed engineering models can greatly increase the likelihood that there is a common understanding of both requirements and corresponding solutions. This is because a model, by definition, reduces the amount of information that needs to be absorbed, while emphasizing the aspects that are of concern. Of course, different stakeholders will have different concerns. These are invariably tied to how the system in question relates to their specific needs. (e.g., designers with its internal structure and workings and regulatory agencies with its conformance to standards and regulations). The worldviews, or viewpoints [3], of these varied concerns can be radically different from each other. Hence, to maximize the communication value of a model, it is necessary not only to extract and incorporate into the model stakeholder-relevant information but also to present it in a form that most readily understood by that stakeholder. On the other hand, it is well known that duplicating information can cause serious problems such as difficulties in maintaining data consistency (which can be a source of other even more serious problems) and duplication of effort. Modern model-based engineering methods have the potential to help us cope with these problems through various automatic or semi-automatic techniques, such as automated model filtering (queries), model merging, and the use of custom model transformations. The purpose of this PhD work will then to exploit the full potential of those aforementioned approaches and technologies which are still largely underutilized: there are no clearly defined and agreed on methods for how to exploit these techniques to deal with the problem of capturing, representing and using viewpoints.

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Département : Département Ingénierie Logiciels et Systèmes (LIST) Laboratory : Laboratoire d'Ingénierie dirigée par les modèles pour les Systèmes Embarqués Start Date : 01-09-2013 ECA Code : SL-DRT-14-0233 Contact : sebastien.gerard@cea.fr

Optimization and parallelisation methods for homomorphic cryptocomputing

A homomorphic encryption system allows to execute several operations (usually logical AND and XOR) directly onto encrypted data, thus without decrypting it. To help the developers to use this technology, CEA LIST has developed a compiler which allows to homomorphically execute programs written in a high-level language (C++). Briefly, the high-level code is transformed into an equivalent boolean circuit and this circuit is executed on encrypted data. The goal of this thesis is to improve the execution performance of homomorphic cryptocomputing. Three trails will be explored: (1) transformation of high-level code into boolean circuit, (2) optimization of boolean circuits and (3) execution of boolean circuit on a parallel architectures. The first issue is to propose and implement optimized versions of operators used in the high-level language (n-bit addition, FFT, sort, min/max, etc.) directly at circuit gate level. The second problem is the automatic and semi-automatic optimization of boolean circuits with respect to specific constraints induced by the homomorphic cryptosystems (asymmetry between the AND and XOR gates, multiplicative depth notably). Finally, the aspect of scheduling, memory management and generation of parallel code for the boolean circuit will be addressed. This research work requires additional skills in combinatorial optimization and cryptology.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoires des fondements des systèmes Temps réel Embarqués Start Date : 01-10-2014 ECA Code : SL-DRT-14-0241 Contact : sergiu.carpov@cea.fr

Triboelectric Energy Harvesters for Smart Textiles

At the heart of MINATEC campus, LETI is an applied research centre in microelectronics and information technologies and health. As a favored interface between industry and academic research, it ensures each year the development and transfer of innovative technologies in various fields. LSCM laboratory is part of CEA/LETI and focuses its researches on innovative sensors and RF communications for transport and habitat. LSCM laboratory works in particular on Energy Harvesting & Low-consumption electronics to develop autonomous wireless sensor networks powered by ambient energy. Combined to embedded electronics, these systems The PhD thesis entitled "Triboelectric Energy Harvesters for Smart Textiles" is aimed at developing energy harvesters for textile industry, by using rubbings in clothes to power autonomous wireless sensor nodes (temperature, RH, gaz,...). The PhD thesis will exploit triboelectric effects (charge generation phenomenon appearing when two materials are rubbed one against the other) which are compatible with clothes lifetimes and requirements (washings, recycling, allergies). The targeted application is: technical textiles for risky jobs (firemen). The PhD student's mission will consist in developing complete measurement chain from the energy harvester to the sensor node to supply. The PhD thesis will take place in CEA-LETI (Grenoble) within the framework of a collaboration between CEA-LETI, Cityzen sciences, specialized in the design of connected textiles and Society of Fiber Science and Technologies, working on the textiles of tomorrow.

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Département : Département Systèmes et Intégration de Solutions (LETI) Laboratory : Laboratoire Systèmes de Capteurs Multimodaux Start Date : 01-10-2014 ECA Code : SL-DRT-14-0246 Contact : sebastien.boisseau@cea.fr

Cache-aware multiprocessor real-time scheduling for embedded systems

In embedded real-time systems, the scheduler plays a central role as it is responsible of the fulfillment of the temporal deadlines that the tasks of an application are subject to, but also of the achievable performances resulting from the effectiveness of its implementation with respect to the underlying hardware architecture. The definition and the characterization of suitable real-time schedulers for multiprocessor/multicore hardware architectures, which are increasingly deployed in the field of embedded systems, makes the context of this PhD proposal. The challenge is to propose scheduling algorithms offering both a theoretical optimality in terms of the use of computing resources but also maximal practical performances. Indeed the effectiveness of a scheduler depends heavily on the preemptions and migrations of tasks that are generated by scheduling decisions, including their impact on the execution time due to the generated use of the underlying memory hierarchy, which is getting increasingly complex in multiprocessor/multicore architectures. The design of such schedulers must take into account the characteristics of the memory hierarchy, that is to say, the appropriate use of different levels of cache, as well as the algorithmic structures used within the tasks and not only minimize the number of preemptions and migrations of the tasks, as most current related work do. The objective of this PhD proposal is therefore to provide multiprocessors/multicores real-time scheduling algorithms that are cache-aware in their spatial and temporal task allocation decisions.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoires des fondements des systèmes Temps réel Embarqués Start Date : 01-10-2014 ECA Code : SL-DRT-14-0247 Contact : Mathieu.Jan@cea.fr

Error correction exploiting the properties of emerging digital memories

Storage memory is one of the major components of modern electronic systems (smart phone, digital camera ?). Besides being non-volatile, an ideal storage memory must be fast, dense, power frugal and cheap. Several new non-volatile memories are currently developed (M-RAM, PC-RAM, CB-RAM, Ox-RAM). For some of them, electrical parameters (charge, resistance) used to encode the binary or multi-valued information in storage cells are distributed over a continuous range. This property may degrade memory reliability and yield due to the inherent variability of memories with high integration densities. On the other hand, the mentioned property could provide new opportunities to provide error detection and correction. The goal of this thesis is to propose and develop new solutions to improve the yield and reliability of emerging memories. These solutions may rely on new types of algebraic error correcting codes (ECCs) or on new decoding approaches of classical algebraic ECCs which will allow to beneficiate from the special properties of the emerging memories in order to increase the error correction power without affecting the check-bit number (without increasing the storage overhead) and/or improve the error correction speed. The PhD student will perform his research and development activities within a research group of CEA LIST which is very engaged in the field of integrated circuit reliability and emerging memory technologies. This work can make the object of projects developed in cooperation with industrial and academic partners.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoire De Fiabilisation des Systèmes Embarqués Start Date : 01-10-2014 ECA Code : SL-DRT-14-0256 Contact : samuel.evain@cea.fr

Crossbar memory architecture and design in emerging 3D resistive technologies

The thesis topic addresses the design of ultra-high density crossbar memory for Ultra-Low-Power embedded systems (Internet-of-Things, Machine-to-Machine). The goals are to drastically improve the performances (consumption & speed) and the integration density, compared to the existing FLASH-based embedded non-volatile memories, in order to fulfil the ULP embedded system specifications. To reach these goals, innovative concepts will be proposed from memory cell level up to memory architecture level. Endurance, reliability, integration and energy efficiency will also be addressed at circuit design level. Test circuits will be designed, manufactured and characterized to demonstrate the proposed concepts. This work will be done in short loop with the technology division at CEA-LETI developing the ReRAM devices that will be used in the non-volatile memory cell. The device performances and electrical characteristics will be defined following the design needs and technology feasibility.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoire Intégration Silicium des Architectures Numériques Start Date : 01-10-2014 ECA Code : SL-DRT-14-0287 Contact : olivier.thomas@cea.fr

Study and design of innovative circuits exploiting the characteristics of new resistive memory technologies

The exponential increase in computing power and memory capacity leads to increasingly complex and data hungry applications. Since 2005, Intel has identified three major applications that are today at the heart of the most demanding systems in terms of computing and memory resources: data recognition, mining and synthesis. The design of such systems, requiring huge memory capacities and massive parallelism, remains challenging because the processing units (CPU) and the memories are always fundamentally separated: this is the Von Neumann bottleneck. In this context, the resistive memory technologies (CBRAM / RRAM / OxRAM) allow to consider extremely efficient and ultra-dense circuits that combine computing and memory functions, bringing recognition and data mining applications to a whole new level. This is possible by exploiting the physical characteristics of these technologies, including the ability to program multiple resistance levels in a single device, as well as the possibility to integrate these devices in dense crossbar between two metal layers, on top of the CMOS layer. This thesis aims at studying a promising track for exploiting these technologies: the implementation of convolutional networks (or deep neural networks). These are today the state of the art in the field of learning and automatic classification of content (audio / video). In such networks, the resistive nano-devices are addressed collectively and in analog, to search and classify the input data in a single operation. A major objective would be to embed such functions into sensors or autonomous systems in place of conventional digital solutions requiring much larger memories and computing power.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoire De Fiabilisation des Systèmes Embarqués Start Date : 01-09-2014 ECA Code : SL-DRT-14-0308 Contact : olivier.bichler@cea.fr

Modeling and dimensioning of hybrid dataflow and real time systems

The emergence of new applications mixinf both real-time tasks and computationally intensive "best effort" tasks such as the ADAS applications (Advanced Driver Assistance Systems) or augmented-reality (e.g. Google Glass), has created new research issues in both modelling and execution levels. Indeed, an effective implementation of such applications requires the hybridization of formalisms and techniques for hard real-time with other more suitable to computationally intensive systems. Properties such as determinism, lack of deadlock etc. are not guaranteed in the same way in real-time computing systems and computationally intensive based systems. The first aim of the thesis is to propose a new task model for these data and time-driven applications. This model will ensure expressing the real-time constraints, guaranteeing high level properties such as determinism, lack of deadlock, liveness, etc. and meeting the size of the buffers. The second goal is to establish a design flow of mixed dataflow and real-time systems. The task model integration in the design flow includes the robust and timed design of buffers, the characterization of latency induced by a dataflow graph for integration into a comprehensive real-time analysis, real-time proof design of mixed applications, placement/routing with real-time constraints, the automatic generation of embedded code and possible high-level optimizations.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoires des fondements des systèmes Temps réel Embarqués Start Date : 01-10-2014 ECA Code : SL-DRT-14-0312 Contact : kods.trabelsi@cea.fr

Optimizing data transfers in distributed multiprocessors using just-in-time compilation and dedicated hardware support

Modern Systems on chip integrate more and more computing resources and memory to meet the ever increasing performance needs. Sadly, these highly parallel architectures have serious programming issues mainly due to the data exchange between processing cores. Two architectural solutions prevail today. The first one tries to keep a unified shared memory by implementing complex hardware coherence mechanisms between physically distributed memories. The other solution consists in moving away from the shared memory view and let the communications be explicitly managed by the software. This is the standard for inter-chip communications. Then, all the complexity is moved from the hardware to the software programmer. Mixed solutions exist based for instance on specific implementation of shared memory library like OpenMP to give a shared memory view to the user on top of distributed memories. These solutions try to extract at compilation time the necessary input and output data of parallelized tasks. However it is often impossible to determine the exact input and output dataset as application are highly dynamic. Hence, such solutions are non-optimal with respect to the data transfers and induce strong performance and power consumption impacts. This thesis will study how these mixed approaches can be further improved by using additional information available only at the execution time. The thesis will target the definition of a complete hardware/software control loop for data transfers based on dedicated hardware monitors feeding the necessary information to a Just-in-Time compilation tool chain allowing for the determination of more exact input/output datasets. The PhD candidate shall be skilled hardware designer with an architectural vision encompassing parallel programming issues.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoire Calcul Embarqué Start Date : 01-10-2014 ECA Code : SL-DRT-14-0339 Contact : tanguy.sassolas@cea.fr

Coordination rules generation from automata, in the context of redeployments of distributed control systems

The general context of this PhD thesis is to enable a reliable redeployment of a distributed application during its execution. The target applications operate continuously, eg building automation, water supply system or industrial process control. There are many reasons for redeployment: load balancing, reducing the energy footprint of the physical infrastructure, update without stopping the application, hardware and / or software redundancy for fault tolerance. This redeployment involves most of the time to change the number of software and machines where the components run. The important points are firstly to implement, in the LINC middleware (developed at CEA), the basic mechanisms to safely start, stop, clone and migrate software components and the control managing the coordination of the components. Secondly, it is essential that the actions to be taken to go from a configuration A to a configuration B are verified and validated using a high-level formalism, such as automata, before the redeployment. The overall objective of the PhD. thesis is to model and validate the redeployment, based on automata theory, and to generate the coordination rules that are executed by the middleware LINC. Thus, it is ensured by construction that the execution of the generated rules of the redevelopment are consistent with the expected results.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoire Infrastructure et Ateliers Logiciels pour Puces Start Date : 01-10-2014 ECA Code : SL-DRT-14-0341 Contact : francois.pacull@cea.fr

New high temperature (>250°C) integrated sensor interface architectures in SOI technologies

The goal of this thesis is to study the full integration of a high temperature (T> 250°C) sensor interface in an SOI technology in order to contribute to the realization of autonomous and communicant sensor nodes for harsh environment application like in-service aerospace jet engine monitoring or well drilling. Thesis work will first focus on providing a power consumption optimized architecture that will circumvent the effects of leakage currents that remain the limiting factor towards high temperature integration. Architecture able to sense the temperature in order to adapt the overall sensor interface parameters will be envisaged. Then, the retained architecture will be implemented in a high temperature SOI process (XFab, IMS). The prototype will be tested using high temperature adapted protocol to assess the reliability and robustness of the proposed solution.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Start Date : 01-10-2014 ECA Code : SL-DRT-14-0362 Contact : franck.badets@cea.fr

Co-design of smart image sensor architectures and advanced optical functions for novel acquisition of images

This thesis will focus on the co-design of integrated architectures and algorithms for smart image sensors aiming to exploit innovative optical concepts such as open aperture or wavefront coding. With the development of integrated circuit technologies and advanced signal processing, the concept of smart image sensor has emerged, an area where Leti has developed a great experience. In addition, micro-and nanotechnology are used to make low-cost, while highly precise optics that perform new functions: micro- mirrors, microlens arrays (e.g. plenoptic cameras such as in the Lytro®) or the spatial light modulators (SLM). The exploitation of resulting images then requires complex processing. Currently, conventional techniques of acquisition and processing images fell in exploiting the potential of these optical elements. Indeed, on the one hand imagers are optimized for the acquisition and transfer of conventional images, on the other hand the processing and control of the optics are both performed on remote processors whose architectures cannot process the signals in extremely short and / or time with an economy of means. Relying on the expertise of optical lab partners, the thesis will jointly co-design algorithms and architectures associated with innovative features to overcome state of the art realizations, both in terms of cost, time response or application fields. Profile: engineer or master 2 with excellent academic records, a strong scientific background and a specialization either in electronic engineering or applied physics, a taste for an interdisciplinary topic at the crossroads between optics, signal processing and integrated electronics.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoire Circuits Intégrés, Intelligents pour l'Image Start Date : 01-10-2014 ECA Code : SL-DRT-14-0396 Contact : antoine.dupret@cea.fr

Flexible piezoelectric transducers based on self-organised GaN nanowires

The aim of the PhD thesis is to design and fabricate piezoelectric transducers based on GaN nanowires obtained by directed growth and integrated into a flexible technology. The candidate will carry out studies on both the fundamental level ? on the material ? and the R&D level ? on the effect of the mechanical deformation of the wires which will enable high performing device optimisation. Experimental aspects will cover the entire development process, from wire growth and structural characterisation to self-organisation and microfabrication processes, as well as the piezoelectric characterisation of the devices. Comprehending electro-mechanical couplings and charge generation / harvesting phenomena from the nanoscopic to the macroscopic scales will require rigorous multi-physics multi-scale simulations of both the individual and the collective piezoelectric response of the wires. More generally, this PhD thesis will also provide the opportunity to develop applicable solution in various fields such as material electronic functionalisation or bio-inspired systems (electronic skin).

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Département : Département Systèmes et Intégration de Solutions (LETI) Laboratory : Laboratoire Fonctionnalisation et Autonomie des Objets Start Date : 01-09-2014 ECA Code : SL-DRT-14-0415 Contact : emmanuelle.pauliac-vaujour@cea.fr

Terahertz imaging: spectral selectivity and super-resolution, innovative features for integrated processing

The thesis will aim at providing to Terahertz imagers the spectral analysis functionality which is very important for sensing hazardous or banned materials. This thesis will also seek to significantly increase the resolution of the resulting image, particularly critical for non-ionizing medical applications where it improves the quality of diagnosis. Terahertz imaging, an emerging technology, is experiencing strong growth in the number of research topics devoted to it because of the interest of some of its properties : very low photon energy, non-ionizing nature, transparency of many materials, total reflection by metal. Much progress in the development of sources and sensors in terms of cost and reliability have paved the way for many applications such as non-destructive testing, security, biomedical. CEA-Leti with its recent achievements, the first Terahertz matrix(2011), better sensitivity for MOS sensor (2013), has demonstrated excellence in this field and with this thesis seeks to overcome the current limitations. At the crosspoint between antenna processing and integrated electronics, this thesis also requires a significant contribution to signal processing. Qualifications: Master with an excellent cursus, a strong general education in science with specialization in electronics, the taste for interdisciplinary topics at the crossroads between integrated electronics , antenna and signal processing. This thesis will benefit from collaborations with national and international laboratories, leaders in their fields.

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Département : Département Architectures Conception et Logiciels Embarqués (LIST-LETI) Laboratory : Laboratoire Circuits Intégrés, Intelligents pour l'Image Start Date : 01-10-2014 ECA Code : SL-DRT-14-0437 Contact : antoine.dupret@cea.fr

System engineering and dependabilitty : towards a methodology to synchronize architecture/design and safety analysis models

The aim of this thesis is to propose a methodology as well as software tools for the synchronization of system architecture models on the one hand and the safety models on the other hand. This thesis is fully integrated in the framework of the researches performed at the laboratory LISE of CEA LIST on the design, the assessment and the validation of complex systems. It is part of a collaboration between the LISE and the team of Professor Antoine Rauzy from Ecole Centrale de Paris. The applicative target stands in all industries where safety is a major concern, i.e. energy, avionic, ground transportation, oil & gas? The proposed methodology and tools should make it possible to ensure the consistency between system architecture models, typically written in SysML and possibly augmented with annotations related to safety mechanisms, and risk analysis models, typically written in AltaRica. These methodology and tools should support the incremental design of systems and the integration of safety concerns from the very preliminary phases of the design. They will rely on abstraction/comparison/concretization mechanisms to extract relevant information from models, compare these data at the suitable level of details and inject back the results of these comparisons into the original models. This work will be integrated within an already rich modeling and design environment of the laboratory (www.eclipse.org.papyrus and its framework for model based safety assessment SOPHIA) and will exploit analysis tools from academic environment such as AltaRica (www.altarica.fr). Key Words: System modeling and analysis, Safety, architectural optimization, critical systems

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Département : Département Ingénierie Logiciels et Systèmes (LIST) Laboratory : Laboratoire d'Ingénierie dirigée par les modèles pour les Systèmes Embarqués Start Date : 01-10-2014 ECA Code : SL-DRT-14-0440 Contact : agnes.lanusse@cea.fr

Integration of heterogeneous components and sensors in a flex multilayers for medical applications

The CEA-LETI develops its research activities in the field of micro-electronics for medical applications. One of the objectives is the development of health devices conformable on the human skin for the monitoring of physiological parameters and pre-scan functions associated. The laboratory that will host the thesis is involved in the project for the interconnection of heterogeneous components (sensors, silicon chips) on or in a flexible structure that will be in contact with skin. The project has big challenges related to technological breakthroughs such as assembly and electrical interconnection rigid / flexible or flexible/flexible. The aim of the thesis is to evaluate the integration of heterogeneous components and sensors in a flexible substrate. The PhD student will participate in the identification of flexible materials and processes associated taking into account existing technologies at LETI. The different steps of the integration will be identified and studied from the point of view of technological feasibility and the scientific understanding of the physico-chemical phenomena involved. An important part of characterization will be taken into account. A test protocol will be established and a vehicle test will be realized to characterize the various integration solutions and validate the technological steps.

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Département : Département Composants Silicium (LETI) Laboratory : Laboratoire Packaging 3D Start Date : 01-09-2014 ECA Code : SL-DRT-14-0465 Contact : jcsouriau@cea.fr

A methodology for verification of Cloud hypervisors by a combination of formal methods and testing

The CEA LIST, based in Palaiseau (near Paris, France), is a key software systems and technology research center working on embedded systems (architecture and design of systems, methods and facilities for software and system dependability, and intelligent vision systems), interactive systems, signal detection and processing in partnership with the major industrial players in the nuclear, automotive, aeronautical, defense and medical fields. The Software Safety Lab of the CEA LIST develops tools for verification and validation of software and software/hardware systems. One of the ongoing projects consists in developping a verified Cloud hypervisor. A first prototype called Anaxagoros has been developed by the Embedded Real-Time System Laboratory of CEA LIST. Security of Cloud hypervisors is one of the most challenging issues of Cloud Computing. This PhD aims to develop a methodology for verification of the implementation of critical components of Cloud hypervisors with the help of a combination of formal methods and testing. One of the difficulties is related to optimized code and data structures that often cannot be successfully verified by static analysis tools alone. However, optimized code can be executed, so testing methods can be applied in combination with formal methods to ensure the reliability of the hypervisor. Another important aspect of verification is modularity of the proof. This PhD will study a methodology of structuring the specification so that the impact of a source code modification remains limited and do not require a new verification (including specification and proof for the whole program) to be started from the beginning. A third research direction is related to hardware. This PhD will study how to take into account the properties of the hardware for a combined verification software/hardware. Verification tools developed at CEA LIST (Frama-C, PathCrawler) can be used during this PhD. The proposed methodology will be applied to the Anaxagoros hypervisor. The candidate will have Master's degree in Computer Science, and good knowledge of Software Verification and Validation.

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Département : Département Ingénierie Logiciels et Systèmes (LIST) Laboratory : Laboratoire pour la Sûreté du Logiciel Start Date : 01-10-2013 ECA Code : SL-DRT-14-0470 Contact : Nikolay.Kosmatov@cea.fr

III-V material integration by layer transfer for 3D architectures

The Advanced Substrate Laboratory (LSA) is specialized in the development of innovative substrates and architectures and has an international reputation in this field. During the last 20 years, the laboratory has been developing innovative substrates in terms of materials and dimensions enabling key technological developments in electronics, radio frequency, optronics or photovoltaics. In the field of microelectronics, the Smart CutTM technology, developed at LETI, has enabled the SOI substrates and, in the same time, the Fully-Depleted devices to take off. Currently, 3D integration appears as a way to keep increasing density of integrated circuits, which has been the driving force of microelectronic industry for now 40 years. This 3D solution is studied in the frame of a new research partnership, with academic and industrial partners, which consists in developing 3D stacked circuits based on the co-integration of III-V and Si materials. The candidate will have to investigate the layer transfer by Smart CutTM in the specific case of III-V materials. In particular an evaluation of the trapping mechanisms of the implanted protons in the complex epitaxial III-V layers has to be led. These studies should lead to the fabrication of III-V layer reported on bulk substrates or on substrates with pre-existing electronic components. In this case, the report technology should be developed with limited overall thermal budget. The electronic conduction properties in the III-V transfer layer as well as the physical mechanisms to obtain optimal conduction properties will be studied. In the end, the candidate will have to optimize the structure dimensions (both in terms of III-V epitaxial layer composition and thickness).

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Département : Département Composants Silicium (LETI) Laboratory : Laboratoire de Substrats Avancés Start Date : 01-09-2014 ECA Code : SL-DRT-14-0480 Contact : julie.widiez@cea.fr
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