Scientific direction Development of key enabling technologies
Transfer of knowledge to industry

PhD : selection by topics

Engineering science >> Electronics and microelectronics - Optoelectronics
13 proposition(s).

Interleaved current source inverters for high power PV converters prototyping

Département des Technologies Solaires (LITEN)

01-09-2019

SL-DRT-19-0061

jeremy.martin@cea.fr

Conventionally, systems for converting electrical energy in the photovoltaic domain are voltage inverter type structures [4] - [7]. In this case, the conversion chain of the photovoltaic energy is composed of two stages: a DC-DC converter followed by a voltage inverter (VSI). These voltage source topologies have short-term disadvantages (link capacitor lifetime problems) [5], [8], [9] and relatively low efficiency (due to a double conversion) [5]. As an alternative solution, the current inverter (CSI) structure can be used. Among the advantages of the CSI structure, can be listed: -A reduction in the number of power components, due to the conversion of energy with a single conversion stage [5] -A longer converter lifetime (compared to conventional structures) due to the suppression of the link capacitor [5], [8], [9] and a voltage in the blocked state seen by the switches lower [11] -Integration of natural short-circuit protection On the other hand, the CSI topology has the following disadvantages: -Relatively high conduction losses due to the series connection of devices (MOSFET + Diode) [4], [6] -Special protection requirements for AC and DC sides [4] For the CSI topology, one possible way to overcome the disadvantage of high switching losses is to use Wide bandgap devices (WBGs). Specifically, SiC semiconductors, because of their higher voltage ranges. The LSPV is currently working on: -The characterization of WBG semiconductors in 1.7kV blocking voltage -The design and building of a 100 kW CSI (using custom modules) -The characterization of the efficiency of the converters by calorimetric methods -The study and building of a high power multi-level CSI converter The subject of the thesis is the logical continuity of this work with an important part relative to the control of the structure, the interleaving of the blocks, the reduction of the size of the input inductor. [1] Jäger-Waldau, A. (2016). PV Status Report 2016. JRC Science for Policy Report (Publications Office of the European Union, 2016). [2] Photovoltaics report. Fraunhofer Institute for Solar Energy Systems-ISE, Freiburg, November 2016. Retieved May 2017. [3] BURGER, Bruno. Power Electronics for Photovoltaics. 2015. [4] Sahan, B., Araujo, S. V., Noding, C., & Zacharias, P. (2011). Comparative evaluation of three-phase current source inverters for grid interfacing of distributed and renewable energy systems. IEEE Transactions on Power Electronics, 26(8), 2304-2318. [5] Bülo, T., Sahan, B., Nöding, C., & Zacharias, P. (2007, September). Comparison of three-phase inverter topologies for grid-connected photovoltaic systems. In Proc. 22nd Eur. Photovolt. Sol. Energy Conf. Exhib., Milan, Italy. [6] Martin, J., Bier, A., Catellani, S., Alves-Rodrigues, L. G., & Barruel, F. (2016, May). A high efficiency 5.3 kW Current Source Inverter (CSI) prototype using 1.2 kV Silicon Carbide (SiC) bi-directional voltage switches in hard switching. In PCIM Europe 2016; Proceedings of (pp. 1-8). VDE. [7] Sahan, B., Vergara, A. N., Henze, N., Engler, A., & Zacharias, P. (2008). A single-stage PV module integrated converter based on a low-power current-source inverter. IEEE Transactions on Industrial Electronics, 55(7), 2602-2609. [8] Wang, H., Liserre, M., & Blaabjerg, F. (2013). Toward reliable power electronics: Challenges, design tools, and opportunities. IEEE Industrial Electronics Magazine, 7(2), 17-26. [9] Yang, S., Bryant, A., Mawby, P., Xiang, D., Ran, L., & Tavner, P. (2011). An industry-based survey of reliability in power electronic converters. IEEE Transactions on Industry Applications, 47(3), 1441-1451. [10] Engler, A., et al. "Design of a 200W 3-phase module integrated PV inverter as part of the European project PV-MIPS." Proceedings of the 21st European Photovoltaic Solar Energy Conference and Exhibition, Dresden, Germany. 2006. [11] Felgemacher, C., Araujo, S. V., Noeding, C., & Zacharias, P. (2016, May). Benefits of increased cosmic radiation robustness of SiC semiconductors in large power-converters. In PCIM Europe 2016; Proceedings of (pp. 1-8). VDE. [12] Rashid, M. H. (2010). Power electronics handbook: devices, circuits and applications. Academic press.

Nonlinear compressive imaging for machine learning

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Circuits Intégrés, Intelligents pour l'Image

01-10-2019

SL-DRT-19-0299

william.guicquero@cea.fr

In a context where the deployment of image sensors combined with computer vision tend to grow very quickly, the major challenges lie in information and signal processing. In the field of smart low-power sensors, the emerging breakthrough technology named Compressive Sensing is of major interest. In the case of embedded systems, autonomous decision-making becomes one of the core device feature while available resources (i.e., memory load, computing complexity and power consumption) remain highly limited. Indeed, the power consumption due to the sensor with dedicated signal processing is largely related to the overall data bandwidth and involved signal dimensionality. In particular, recent theoretical results demonstrate that standard Machine Learning approach can be advantageously applied in the compressed signal domain. However, those results are only restricted to the methods said as « linear », i.e. based on linear projections. The first objective of this PhD will thus be to properly identify theoretical limitations related to the combination of advanced Machine Learning with Compressive Sensing. It will aim at providing cutting-edge algorithm principles outperforming state-of-the-art tradeoffs between resources and inference accuracy. Thanks to a solid background in the laboratory on these fields of research, the goal of this thesis will be to evaluate the interest of introducing non-linearity during the acquisition process in order to improve the overall efficiency. This will help to define proper levers for smart sensor design enabling close-to-sensor context recognition (e.g., specific object detection with a highly limited hardware).

Study of 300-GHz electronically reconfigurable transmitarray antennas in monolithic technology

Département Systèmes

Laboratoire Antennes, Propagation, Couplage Inductif

01-12-2018

SL-DRT-19-0320

antonio.clemente@cea.fr

Due to the scarcity of electromagnetic spectrum resources and the need of broad bandwidth for high data-rate communications, the millimetre wave (mm-wave) and sub-THz bands from 30 to 350 GHz are very attractive for 5G and beyond 5G applications. In this context, high gain electronically reconfigurable antennas with beam-steering, multi-beam, and beam-forming capability are required in a huge number of emerging applications for radar, sensing, and communication systems (civil and military) typically ranging from C-band (4-8 GHz) to W-band (75-110 GHz). Typically composed of one or more radiant surfaces operating in transmission mode and illuminated by one or more focal sources, transmitarrays (also called discrete lens) are a recent cutting-edge antenna concept. Transmitarrays are realized using multilayer printed circuit technologies compatible with the integration of the active devices (diodes, MEMS, NEMS, semi-conductors, etc.). These devices can be used to control the electromagnetic field on the array aperture with excellent performances (bandwidth, cross-polarization level). CEA and IETR (university of Rennes I) have a very strong and unique expertise on transmitarray antennas. The previous realized studies form 2006 demonstrated the potentiality of transmitarrays in X-band (8-12 GHz), in Ka-band (28-40 GHz), and in V-band (50-70 GHz). The major scientific & technical innovations beyond the state-of-the-art are the following: first experimental demonstrations ? at world level ? (1) of highly efficient (70%) and highly directive (gain > 43 dBi) flat antennas at 300 GHz, (2) of ultra-flat transmitarray antennas, and (3) of self-alignment techniques for highly-directive flat antennas beyond 80 GHz.

Low Level Programming model for not "Von Neumann" architecture

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Infrastructure et Ateliers Logiciels pour Puces

01-10-2019

SL-DRT-19-0325

Henri-Pierre.Charles@cea.fr

Since the 60s the programming model used by processors is the "Von Neumann" model in which a processor will look for instructions and data to be processed in the same memory. Increasing the transistor density on a chip has increased its frequency but has produced a "bottleneck" to the memory that can not provide instructions and data at the same frequency : the memory wall. Many architectural solutions have been proposed to solve this bottleneck. One of the solutions we are studying is an architecture in which calculations are made in memory, without moving the data to the processor. The evaluation of this solution has shown impressive potential gains in speed (x10000) and energy (x30). To exploit this potential, it is necessary to change the programming model because the instructions will no longer be read in memory but generated by a processor that will drive one or more memory plane. The subject of the thesis will be the compilation of a high-level language to a flow of instructions interleaving processor instructions responsible for controlling and calculating addresses and instructions for controlling calculations in memory. This subject is a part of a bigger project in which we create a system composed of processor and computing memory.

Protecting binary elliptic curve cryptography against Template atttacks and Horizontal attacks

Département Systèmes

Laboratoire Sécurité des Objets et des Systèmes Physiques

01-09-2019

SL-DRT-19-0385

antoine.loiseau@cea.fr

This study takes place in the field of embedded systems security and the asymetric cryptography against Template and Horizontal side channel attacks. Recent studies, applied to the symetric cryptography, have yielded new side channel attacks : by improving the efficiency of Template attacks, these new attacks allow to bypass countermeasures based on desynchronisation and masking. It is time now to study the relevance of those new Machine Learning-based Template and Horizontal attacks to asymetric cryptography, especially for binary elliptic curves. This thesis follows the work of Antoine Loiseau on Binary Edwards Curves (BEC). Those BECs have been proven to have some intrisic properties of security against side channel attacks. However, latest results have shown that the resistance of BECs against the new ML-based Template and Horizontal attacks have yet to be studied. This thesis aims at qualifying the degree of resistance of those BECs to ML-based Template and Horizontal Attacks and at devising, implementing and testing new countermeasures to twarth those lastest générations of side channel attacks.

Miniature and directive antenna design with frequency agility over several octaves

Département Systèmes

Laboratoire Antennes, Propagation, Couplage Inductif

01-09-2019

SL-DRT-19-0423

serge.bories@cea.fr

The 'New Space' sector pushes for innovative solutions concerning on board micro-satellites antenna design. With smaller satellites, the miniaturization of directive and extremely wide band antenna represents a solution to fill the requirements of a lot of services. The double circular polarization needs to be ensure properly over more than 2 octaves. The CEA Leti antenna laboratory proposes to skirt the classical antenna physical limitation (bandwidth / miniaturization) by tuning the antenna on a smaller instant sub-band that can be shifted with reconfigurable RF components. This is the concept of antenna aperture tuning. The novelty of the PhD subject is to extend the tuning range over several octaves thanks to tunable capacitors developed at CEA Leti. The challenge consists to optimize the miniaturization of the antenna structure while limiting the impact of losses introduced by the tunable capacitors and get a performance stability over several octaves. Prototypes will be realized and measured in the CEA Leti or CNES anechoic chamber.

Multi-level inverter based on switched photovoltaic modules

Département Systèmes

Laboratoire Electronique Energie et Puissance

01-10-2019

SL-DRT-19-0470

ghislain.despesse@cea.fr

The thesis aims to develop a power conversion architecture based on switched photovoltaic modules that both optimize the use of each photovoltaic panel and optimize the power transfer to the electrical network. The principle consists to dynamically add / remove modules from a serialization to generate the desired output voltage. This principle has already been evaluated and tested in the case of batteries management and has shown many advantages: switching low voltages (drastic reduction of switching losses), increased flexibility (the average current extracted from each module can be adjusted independently), allows service continuity in the event of a faulty element. We wish, through this thesis, to extend this principle to the case of photovoltaic production, with its whole specificities. A photovoltaic module is rather a source of current than of voltage and the optimization of the module operation require that the current extracted places it in a maximum mode of energy extraction (MPPT: Maximum Power Point Tracking). This optimal point being different for each module due to dust, orientation, defects, shading ... It is necessary to determine the control laws to bring each module to their optimum operating point. This optimization of the operation of each module must be done while following at same time and in real time the mains voltage level at the output of the overall photovoltaic system and this with a sinusoidal current amplitude which maximizes the global output power.

VHF converter incorporating innovative passive components

Département Systèmes

Laboratoire Electronique Energie et Puissance

01-10-2019

SL-DRT-19-0573

sebastien.carcouet@cea.fr

The aim of the thesis is to develop a very high frequency converter (> 10 MHz) and exploiting innovative passive components. The increase in frequency allows the use of smaller passive components in value, size and weight. Indeed, the higher the frequency is, the lower the energy is stored and exchanged per cycle, the lower the volume of the inductor and / or capacity is and the higher the power density of the converter is. Moreover, a high switching frequency allows a faster converter response to operating condition changes (shorter response time). However, when the converters operate at more than 10MHz, commonly used structures, even conventional resonant structures, are no longer suitable even via Zero Voltage Switching (ZVS). This is why a new inverter topology, breaking with half or full bridge topologies is being considered. The objective of the thesis is to design, model and experimentally validate new high frequency DC / DC converter topologies using piezoelectric materials whose quality factor is high. The power level considered is from a few tens to a few hundred watts.

3D Thermomechanical Modeling of Printed Circuit Boards

DLORR

01-09-2019

SL-DRT-19-0623

manuel.fendler@cea.fr

The digital transition is illustrated in the factory of the future by the instrumentation of tools and parts evolving in extremely harsh environments for the Internet of Things. In order to ensure an efficient and robust integration, the study proposed in the context of this thesis aims to acquire knowledge of design constraints, and to implement the modeling and simulation tools that allow the collaborative mechanical and electronical design of future intelligent industrial systems

Electronic packaging by cold spray metallic encapsulation

DLORR

01-09-2019

SL-DRT-19-0624

manuel.fendler@cea.fr

The digital transition is illustrated in the factory of the future by the instrumentation of tools and parts evolving in extremely harsh environments for the Internet of Things. One of the difficulties is to integrate wireless communicating functions inside metallic parts, in particular for purposes of traceability with RFID tags. Due to the difficulties associated with the delicate electromagnetic environment, there are no integration solutions in the state of the art. The aim of this study is to investigate the potentialities offered by the Cold Spray technique, by characterizing the beneficial effects of texture on the metal absorption properties thus implemented to encapsulate the electronic chip.

Tools and methods for securing a memory hierarchy against software side-channel attacks

Département Systèmes

Laboratoire Sécurité des Objets et des Systèmes Physiques

01-10-2019

SL-DRT-19-0625

thomas.hiscock@cea.fr

Nowadays, computing systems execute an important quantity of untrusted software and have to isolate them from other user-trusted applications. For such multi-applications environments, strong process isolation is mandatory for security. Indeed, it prevents malicious processes to read or modify data of legitimate ones. In practice, perfect isolation is very difficult to achieve. Indeed, virtual memory or virtualisation are usually not sufficient: processes still execute on the same hardware and share lots micro-architectural elements. The memory hierarchy, from first level of caches to random access memory (RAM) represents without doubts the most important part of hardware shared between different processes and hence represents a large surface of attack. This is illustrated by many examples like cache attacks, known for more than a decade, software-induced faults in DRAM (Rowhammer) or information leakage through the MMU. Even the famous Spectre and Meltdown attacks revealed in 2018 rely on caches to extract sensible information. Since most of these vulnerabilities are known for years, a large panel of ?vulnerability-specific? countermeasures is available. However, no single solution covers all these vulnerabilities and the interaction of these countermeasures is not really studied. The first objective of this thesis is to develop new tools (statistical and/or simulation based) to reason about the security of the memory management hardware as a whole. These tools will form a solid basis to compare existing countermeasures taken from the state-of-the-art and combine them efficiently. Finally, a key contribution of the thesis will be to propose, design and evaluate possible countermeasures to secure the memory hierarchy.

Study of DNA origami?surface interactions for application in lithography

Département Technologies Silicium (LETI)

Laboratoire

01-09-2019

SL-DRT-19-0684

raluca.tiron@cea.fr

In nanotechnology in general and semiconductor industry in particular, there is an ever increasing need for smaller and more complex features at an ever lower cost. Some examples of applications are sub-10 nm features for creation of FinFETs, lateral (horizontal) and vertical gate-all around nanowires, single electron transistors and advanced non-volatile memories (STT-RAM, MRAM, OxRAM, etc.). To address the challenge of patterning at sub-10 nm features novel patterning approaches must be envisioned. DNA (deoxyribonucleic acid), by virtue of its inherent small diameter (2 nm), tendency to self-organize into various different morphologies and its possibilities for functionalization, offers the possibility to realize both two- and three dimensional structures at nanometer scale. The goal of this PhD work is to demonstrate the feasibility of nanostructuring the surface of a substrate using DNA origami as a mask, with an ultimate resolution of a few nanometer, with a density that is above the current state of the art in semiconductor industry. The focus of the internship will lie on ever more complex features, while ensuring long-range order by conventional lithography guide patterns. The last part of the thesis consists of the effective transfer of the DNA pattern into the substrate.

Improvement of performance X and gamma-ray imaging by identification of semiconducting detector parameters

Département d'Optronique (LETI)

Laboratoire pour la Visualisation et l'Eclairage

01-10-2019

SL-DRT-19-0796

gmontemont@cea.fr

Our laboratory designs X and gamma-ray imaging systems for medical imaging or luggage control. We use CdTe or CdZnTe-based detectors that are sensitive to five physical parameters of the interaction: deposited energy E, interaction time T and the 3-dimensional position XYZ. These parameters are estimated by real-time analysis of anode electronics signals. These detectors have been significantly improved in recent years but some limits remain, especially those due to the non-uniformity of the response due to physical properties of the material. The goal of this Ph.D. internship is to overcome these limits by a detailed modelling and characterization of the actual detector response. The identification of internal physical parameters of the detector would allow to optimize estimation of interaction location, time and energy. The student should have a background in mathematics, statistics or physics and a high affinity for multi-disciplinary research.

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