Scientific direction Development of key enabling technologies
Transfer of knowledge to industry

PostDocs : selection by topics

Technological challenges >> New computing paradigms, circuits and technologies, incl. quantum
3 proposition(s).

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Variable Capacitor MEMS Devices for Boolean Logic Operation at High Temperature

Département Composants Silicium (LETI)

Laboratoire Gestion de l'Energie, Capteurs et Actionneurs

01-01-2021

PsD-DRT-21-0013

gael.pillonnet@cea.fr

Nouveaux paradigmes de calculs, circuits et technologies, dont le quantique (.pdf)

The objective is to design a new generation of MEMS to achieve a variable capacitance devices controlled through an electrostatic actuation. These devices will be integrated in logic gates structures to ensure reliable Boolean operations at high-temperature. This study is based on a complete breakthrough proposal compared to the classical transistor-based logic to distinghish the logic state even in a large thermal bath. The postdoctoral PhD student will propose, model and simulate electro-mechanical micro fabricated structures to validate the theoretical principle recently announced by some senior-scientists in our laboratory. The project involves other leading universities and it is an excellent opportunity for post doc' to be in advanced research program.

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Simulation and electrical characterization of an innovative logic/memory CUBE for In-Memory-Computing

Département Composants Silicium (LETI)

Laboratoire d'Intégration des Composants pour la Logique

01-01-2020

PsD-DRT-20-0029

francois.andrieu@cea.fr

Nouveaux paradigmes de calculs, circuits et technologies, dont le quantique (.pdf)

For integrated circuits to be able to leverage the future ?data deluge? coming from the cloud and cyber-physical systems, the historical scaling of Complementary-Metal-Oxide-Semiconductor (CMOS) devices is no longer the corner stone. At system-level, computing performance is now strongly power-limited and the main part of this power budget is consumed by data transfers between logic and memory circuit blocks in widespread Von-Neumann design architectures. An emerging computing paradigm solution overcoming this ?memory wall? consists in processing the information in-situ, owing to In-Memory-Computing (IMC). However, today's existing memory technologies are ineffective to In-Memory compute billions of data items. Things will change with the emergence of three key enabling technologies, under development at CEA-LETI: non-volatile resistive memory, new energy-efficient nanowire transistors and 3D-monolithic integration. At LETI, we will leverage the aforementioned emerging technologies towards a functionality-enhanced system with a tight entangling of logic and memory. The post-doc will perform electrical characterizations of CMOS transistors and Resistive RAMs in order to calibrate models and run TCAD/spice simulations to drive the technology developments and enable the circuit designs.

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Scalable digital architecture for Qubits control in Quantum computer

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Intégration Silicium des Architectures Numériques

01-01-2021

PsD-DRT-20-0116

eric.guthmuller@cea.fr

Nouveaux paradigmes de calculs, circuits et technologies, dont le quantique (.pdf)

Scaling Quantum Processing Units (QPU) to hundreds of Qubits leads to profound changes in the Qubits matrix control: this control will be split between its cryogenic part and its room temperature counterpart outside the cryostat. Multiple constraints coming from the cryostat (thermal or mechanical constraints for example) or coming from Qubits properties (number of Qubits, topology, fidelity, etc?) can affect architectural choices. Examples of these choices include Qubits control (digital/analog), instruction set, measurement storage, operation parallelism or communication between the different accelerator parts for example. This postdoctoral research will focused on defining a mid- (100 to 1,000 Qubits) and long-term (more than 10,000 Qubits) architecture of Qubits control at room temperature by starting from existing QPU middlewares (IBM QISKIT for example) and by taking into account specific constraints of the QPU developed at CEA-Leti using solid-state Qubits.

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