Scientific direction Development of key enabling technologies
Transfer of knowledge to industry

PostDocs : selection by topics

Engineering science >> Electronics and microelectronics - Optoelectronics
12 proposition(s).

Design for reliability for digital circuits

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Fiabilité et Intégration Capteur

01-03-2018

PsD-DRT-18-0010

valentin.gherman@cea.fr

Flash memories are a key enabler for high-temperature applications such as data acquisition and engine control in aerospace, automotive and drilling industries. Unfortunately, the retention time of flash memories is very sensitive to high temperatures. Even at relatively moderated temperatures, flash memories may be affected by retention-related problems especially if they are set to store more than one bit per cell. This impact can be mitigated by periodically refreshing the stored data. The problem is that, in the presence of a variable operating temperature that could be due to variable environmental and workload conditions, a fixed data-refresh frequency may become disproportionately large with a subsequent impact on response time and cycling endurance. The first objective of this project is to implement a data-refresh method based on a specially designed counter that is able to (a) track the evolution of the temperature and its impact on the data retention time of Flash memory blocks, (b) trigger warnings against potential retention time hazards and (c) provide timestamps. The second objective is to find the distribution law that gives the evolution of the number of data retention errors in time. The goal is to implement a methodology able to infer the remaining retention time of flash memory pages based on their data retention age, i.e., the elapsed time since data was stored, and the number of retention and non-retention errors. The publication of the scientific results in high-ranked conferences and journals is major project objective.

Ultra Low Power RF Communication Circuit and System Design for Wake-Up Radio

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Architectures Intégrées Radiofréquences

01-01-2019

PsD-DRT-19-0026

dominique.morche@cea.fr

Today, there is a strong demand in developing new autonomous Wake-Up radio systems with tunable performances and independent clocking system. The objectives of the proposed contract it to exploit the capacity of CMOS FD-SOI technologies to develop such devices, improving power consumption and RF performance above the state of the art, thanks to the natural low parasitic and tuning capacity through back biasing of the FD-SOI . A particular attention will be paid to the development of a new power efficient, fast settling, frequency synthesis system. The chosen candidate will be involved both in RF system and circuit design, with the support of the experienced RF System & Design team.

Nouvelle approche de conception circuits et systèmes en optimisation conjointe avec des technologies en rupture

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

Laboratoire Architectures Intégrées Radiofréquences

01-01-2019

PsD-DRT-19-0027

dominique.morche@cea.fr

The objective of this contract is to validate and improve a new system and circuit optimisation approach on different application areas. The candidate will be in charge of creating the architectural model taking into account the different solutions that can be used, starting from the simplest implementation and then adding gradually complexity and precision to the models. The purpose will be to compare the result of the analysis approach to the value obtained on existing systems developped in CEA. For that purpose, the candidate will be jointly working with numerous teams working on technology development, technology modeling and characterization, circuit design and lastly system modeling. To validate the proposed approach, the objective of the candidate will be to test it on three different levels: at basic building block level (lna, ring oscillator) using 22 FDX technology, at function level (front-end module for WiFi) using 130nm PD-SOI and lastly for imagers and mmw radars using 3D technology.

Innovative modeling for technology-design-system co-optimization

Département Composants Silicium (LETI)

Laboratoire de Simulation et Modélisation

01-01-2019

PsD-DRT-19-0028

luca.lucci@cea.fr

The post-DOC will support the device modeling part of a research project investigating new methodologies for system and circuit optimization with the aim of achieving a better integration between the knowledge of the detailed characteristics of a specific technology, the circuit-design methodology and the system architecture. The practical goal is to leverage the existing multi-disciplinary know-how for benchmarking of system and technologies to advance the analysis past the usual PPA, PPAY and PPAC approaches that are commonly deployed in such cases. In more detail, the post-DOC will develop "pre"-spice models for actives and passives which will constitute the basic bricks for the optimization methodology developed in the overall project. Active device modeling will have a starting point in the works of EPFL based on the analytical expression of invariants such has the inversion coefficient.

Characterization and Modeling of epitaxial leakage current and trapping effects in GaN on Si substrates

Département Composants Silicium (LETI)

Laboratoire de Caractérisation et Test Electrique

01-03-2019

PsD-DRT-19-0031

william.vandendaele@cea.fr

Understand and model the leakage current in the epitaxial structure as well as the trapping effects in GaN on Si substrates remain critical to optimize efficiently the final device (HEMT or Diode) dynamic behavior. Current collapse, OFF state and Breakdown voltage are directly related to the quality of the GaN on Si substrate. Up to now, only partial explanation of the leakage mechanims are reported and hardly modeled. Plus the direct correlation between current collapse and substrate leakage is not so obvious. The postdoctoral position will consist on : Advanced electrical characterization (IV, I(t), Susbtrate ramping, C(V)...) at different temperature and illumination conditions will be performed on epitaxial layers or final devices. Extracted parameters and data will be analyzed thouroughly to deduce the predominant condutction mechanisms in the different layers of the epitaxial stack. TCAD modeling will be used to fit experimental data thanks to relevant extrated parameters.

Detection of small particules in the environment with nanomechanical resonators

Département Composants Silicium (LETI)

Laboratoire Composants Micro-Capteurs

01-06-2019

PsD-DRT-19-0033

sebastien.hentz@cea.fr

Today, there are solutions for detecting and quantifying PM10 and PM2.5 type particles (10 and 2.5µm diameter); their reliability depends essentially on their cost. These solutions are essentially optical, and they must be improved for particles down to a micron. For even smaller particles that are even more dangerous to health, there does not seem to be an obvious solution today. Nanomechanical resonators perform very well in these size / mass ranges, as demonstrated by our recent results obtained with our system for biological objects in liquid, recently published by the journal Science (http://science.sciencemag.org/content/ 362/6417/918). These nanoresonators therefore appear as a promising technology for the detection of PM especially for certain applications of air quality control in real time. It will therefore be necessary to study the possibility of detecting particles in the air, in particular those which are hardly detectable today (PM <0.5). We will rely very largely on the systems developed for the detection of biological particles in liquid medium. It will be a question of taking advantage of this know-how and of adapting the system architectures, but also the nanomechanical resonators themselves for the detection of particles in aerosol. We will target representative nanoparticles, organic, pathogenic or non-pathogenic. In terms of resonators, we will also take advantage of current fabrications, with specific designs (electrical or optomechanical) for this application. We will particularly study the possibility of preventing fouling problems. The candidate will be fully integrated into the team around mass detection with nanoresonators.

Cryogenic Analog Front-End for Quantum Computing

Département Architectures Conception et Logiciels Embarqués (LIST-LETI)

01-02-2018

PsD-DRT-18-0041

gael.pillonnet@cea.fr

Quantum engineering is a rapidly evolving novel domain in device technology, boosted by the recent progress in semiconductor quantum bits (QuBits) and by the major opportunity to combine the quantum device with dedicated electronics of conventional CMOS technology working at low temperatures (= 4 K). The ultimate goal of the research related to the proposed post-doc will be the development of silicon-based systems containing many QuBits and versatile electronics based on mature industrial technology, in order to facilitate the massive introduction of quantum processors. Nowadays state-of-the-art experiments on low-temperature quantum devices use electronic components at room temperature, but the future development of integrating many QuBits together complicates the device control with the multiplication of data lines. Minimal power dissipation and noise characteristics will be the challenging key elements to control a large number of QuBits. At CEA Grenoble, we have developed the first semiconductor QuBit fully realized on a CMOS 300-mm foundry that uses the spins of holes in Si as quantum state. The subject of the post PhD is aimed to build the electronics needed nearby the QuBit at low temperatures, using industrial CMOS technology (FDSOI 28nm) compatible with Silicon Qubits. The post PhD will be asked to develop his competence in the quantum physics of QuBits, the modelling of transistor parameters at low temperatures, and the design and measurement of analogue electronics, with the main task in developing and testing CMOS circuitry at low temperatures.

Low temperature process modules for 3d coolcube integration : through the end of roadmap

Département Composants Silicium (LETI)

Laboratoire d'Intégration des Composants pour la Logique

01-03-2019

PsD-DRT-19-0048

claire.fenouillet-beranger@cea.fr

3D sequential integration is envisaged as a possible solution until the end of CMOS roadmap. Different process modules have been developped @ 500°C for planar FDSOI technology in a gate first process. However, regarding bottom transistor level stability in CoolcubeTM integration, and yield consideration, the need to reduce further the top transistor temperature down to 450°C should be explored. The post-doc will have in charge the development of specific technological modules at low temperature both 500°C and 450°C for FDSOI planar devices to acquire a solid knowledge in low temperature CMOS process integration. The specific low temperature gate module will be addressed on planar devices. The threshold voltage modulation will also be studied. The work will be performed in collaboration with the technological platform process of LETI for the low temperature modules development. The electrical characterization in collaboration with the characterization laboratory and the TCAD simulations team of LETI.

Feasability study and development of models towards SPICE-simulation of silicon Qubit quantum circuits

Département Composants Silicium (LETI)

Laboratoire de Simulation et Modélisation

01-08-2019

PsD-DRT-18-0056

sebastien.martinie@cea.fr

The Compact / SPICE model is the link between the development of technological bricks and circuit design. The model purpose is to accurately reproduce the experimental characteristics essential to digital, analog and mixed circuit design. But today we need deeper investigation to set up the specifications of models for such device, in order to provide adequate tools to help circuit designers building up quantum circuits. The main challenge is to be able to describe the quantum behavior of this architecture. It will also be necessary to study if this behavior must be described via the physical quantities (eg electronic spin, energy level ...) or by logical quantities (quantum state, matrix of transformation, ...). It will also be necessary to take into account the compatibility between the mathematical formalism and the standard tools of compact modeling (through Verilog-A description). Following recent experimental research activities (between CEA and CNRS) concerning the first demonstration of hole spin qubit on SOI, we propose first to investigate how to model such device through macro modeling approach where SET compact model, inclusion of magnetic spin degeneracy and management of RF excitation are main steps. The challenges in regards to literature are inclusion of magnetic field in SET model, description of resonant tunneling, RF excitation of SET and reproduction of Rabi oscillations.

Frequency reference oscillators for the 5G technology based on acoustic resonators

Département Composants Silicium (LETI)

Laboratoire Composants Radiofréquences

01-09-2019

PsD-DRT-19-0063

marc.sansaperna@cea.fr

Millimetre-wave 5G systems require increasing modulation complexities as a means to improve data bandwidth, but they are currently limited by the phase noise of local oscillators, based on quartz resonators. Developing high-performance and high frequency reference oscillators, ideally in the GHz range, would address this problem. In this context, reference oscillators based on micro-electromechanical systems (MEMS) represent a privileged way to achieve these specifications The CEA-Leti has proven experience in the development of acoustic-wave MEMS resonators (Reinhardt et al. IEEE-IMSD, 2012) and silicon-based MEMS (Dominguez-Medina et al. Science 2018), with a special focus in low-noise applications (Sansa et al. Nature Nanotech. 2016). This expertise, together with its technological platform (8500m2 of clean room) and unique fabrication processes, make it one of the leading research actors in the field. The post-doc project consists on the development of high-performance reference oscillators in the 1-5 GHz band based on MEMS resonators. The post-doc will start by performing a study and characterization of current MEMS resonators fabricated in the Leti, and will then identify ways to improve their performance. Based on these first results, the post-doc will then be in charge of the design and characterization of a new generation of devices. The candidate will have a PhD in MEMS or acoustic resonators, with experience in characterization, signal processing and physics of the device.

FDSOI technology scaling beyond 10nm node

Département Composants Silicium (LETI)

Laboratoire d'Intégration des Composants pour la Logique

01-11-2018

PsD-DRT-18-0074

claire.fenouillet-beranger@cea.fr

FDSOI (Fully-Depleted Silicon On Insulator) is acknowledged as a promising technology to meet the requirements of emerging mobile, Internet Of Things (IOT), and RF applications for scaled technological nodes [1]. Leti is a pioneer in FDSOI technology, enabling innovative solutions to support industrial partners. Scaling of FDSOI technology beyond 10nm node offers solid perspectives in terms of SoC and RF technologies improvement. Though from a technological point of view, it becomes challenging because of thin channel thickness scaling limitation around 5nm to maintain both good mobility and variability. Thus, introduction of innovative technological boosters such as strain modules, alternative gate process, parasitics optimization, according to design rules and applications, become mandatory [2]. The viability of these new concepts should be validated first by TCAD simulations and then implemented on our 300mm FDSOI platform. This subject is in line with the recent LETI strategy announcement and investments to develop new technological prototypes for innovative technology beyond 28nm [3]. The candidate will be in charge to perform TCAD simulations, to define experiment and to manage them until the electrical characterization. The TCAD simulations will be performed in close collaboration with the TCAD team. The integration will be done in the LETI clean room in collaboration with the process and integration team. Candidate with out-of-the-BOX thinking, autonomy, and ability to work in team is mandatory. [1] 22nm FDSOI technology for emerging mobile, Internet-of-Things, and RF applications, R. Carter et al, IEEE IEDM 2016. [2] UTBB FDSOI scaling enablers for the 10nm node, L. Grenouillet et al, IEEE S3S 2013. [3]https://www.usinenouvelle.com/article/le-leti-investit-120-millions-d-euros-dans-sa-salle-blanche-pour-preparer-les-prochaines-innovations-dans-les-puces.

Direct interfacing of bio-inspired NEMS Sensors to bio-inspired RRAM spikingnetworkRKS

Département Composants Silicium (LETI)

Laboratoire de Composants Mémoires

01-06-2019

PsD-DRT-19-0075

elisa.vianello@cea.fr

Extracting useful and compact information from sensor data is key for future mobile and Internet of Things (IoT) applications. Mining data from raw sensors remains an open problem, so that systems capable of handling large volumes of noisy and incomplete real-life data are required. Today, the most promising approach is deep learning. Despite its benefit, the adoption of deep learning within IoT faces significant barriers due to the constraints imposed by mobile devises (memory, power consumption, and limited transmission range). One possible approach to tackle these challenges is to rethink and reorganize computer architecture taking inspiration of living organisms. Insects are not able to perform calculations like digital systems but excel in controlling small and agile motor systems based on the fusion of data sparse sensory inputs. Moreover, they operate under severe constrains, of energy conservation and limited communication range, among others. Therefore, they provide highly interesting model systems for neuromorphic embedded computation. Resistive RAM (RRAM) are non-volatile memory elements whose values/conductances change as a function of the applied pulses. Thanks to these properties they are prime candidates for implementing plastic synapses in neuromorphic systems. Arrays of micromechanical pillars mimicking the cricket hairs have been demonstrated to be excellent air flow sensors. The main objective of the project is to develop a bio-inspired RRAM-based spiking neural network directly interfaced with a bio-inspired MEMS sensor for readout and local information processing. The main research objective is the design, fabrication and test of a RRAM-based spiking neural network for the readout of an already available nanomechanical resonator array. The alleged advantages of the proposed bio-inspired design throughout the whole system will be demonstrated by simulations calibrated on the experimental results.

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